Attack ChainAIDerived
Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain
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AccessGain hypervisor or host root access
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DeliveryIdentify active SEV-protected guest VMs
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ExploitInvoke PSP operation without proper lock state
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ExecutionAccess PSP-managed guest cryptographic context
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ImpactExfiltrate guest memory or key material
Vulnerability Assessment
| Weakness |
CWE
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| Exploitation Conditions | Exploitation requires local access to the physical or virtual host system with high privileges - specifically hypervisor-level or host OS administrative access on a server equipped with an affected AMD EPYC processor. The flaw is within the PSP firmware, so exploitation is only meaningful in deployments using AMD SEV (or SEV-ES/SEV-SNP) to protect guest VM memory isolation; on bare-metal systems without active guest VMs under SEV protection, the practical confidentiality impact is reduced. Limiting factors include: (1) local-only attack vector with no remote path, (2) high privilege requirement meaning the attacker must already control the host, (3) the attack is not automatable per CISA SSVC assessment, and (4) impact is scoped to guest confidentiality rather than the host system itself. Standard cloud multi-tenant threat models are the primary concern - an internal privileged cloud operator or a threat actor who has escalated to hypervisor level is the realistic adversary profile. |
| Impact | Real-world risk is moderate and narrowly scoped despite the sensitivity of the impacted technology. The CVSS 4.0 vector (AV:L/AC:L/AT:N/PR:H/UI:N) confirms local access with high privileges is required, ruling out remote or unauthenticated exploitation. The SSVC assessment corroborates this: exploitation status 'none', not automatable, and only partial technical impact. EPSS at 0.01% (2nd percentile) reflects essentially no observed exploitation activity. One notable discrepancy exists: the CVE description states the impact is on 'guest confidentiality' (a confidentiality breach), yet the provided CVSS 4.0 vector encodes SI:H (subsequent system integrity, high) with SC:N (no subsequent confidentiality impact) - this conflict should be verified against the AMD advisory at AMD-SB-3034. The tag 'Information Disclosure' aligns with the description, not the CVSS vector. Despite the low EPSS, organizations deploying EPYC-based SEV for multi-tenant workload isolation (cloud providers, confidential computing use cases) should treat this as a meaningful control-plane risk given the trust model being violated. KEV status is not confirmed; no public exploit identified at time of analysis. |
| Exploit ScenarioDerived | A privileged attacker with hypervisor-level or host OS root access on an AMD EPYC-based server exploits the missing PSP lock check to access PSP-managed state during a window when guest VM cryptographic context should be locked, potentially reading decrypted guest memory or cryptographic material that AMD SEV was intended to protect. No public exploit code exists at time of analysis, and successful exploitation likely requires precise knowledge of PSP firmware internals and timing, limiting this to sophisticated actors targeting specific high-value confidential computing deployments. |
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Alert meAnalysisAIv1 – Jul 24, 2026
Missing lock check in the AMD Platform Security Processor (PSP) across multiple EPYC server CPU generations enables a locally privileged attacker to potentially compromise guest VM confidentiality, undermining AMD SEV-based isolation guarantees. Multiple series are confirmed affected - EPYC 7003, 8004, 9004, 9005, and all corresponding Embedded variants - with firmware patches now available for each. No public exploit code exists and CISA SSVC rates exploitation as 'none' with partial technical impact, consistent with the 0.01% EPSS score (2nd percentile), making this a targeted risk primarily relevant to cloud and virtualization providers relying on AMD SEV for tenant isolation.
RemediationAI
Vendor-released firmware patches are available for all affected families. Apply the following PSP firmware updates per platform: AMD EPYC 9005 Series - TurinPI_1.0.0.8; AMD EPYC 9004 Series - GenoaPI_1.0.0.H; AMD EPYC 8004 Series - GenoaPI_1.0.0.H; AMD EPYC 7003 Series - MilanPI-SP3_1.0.0.J; AMD EPYC Embedded 9005 Series - EmbeddedTurinPI_SP5_1004; AMD EPYC Embedded 9004 Series - EmbGenoaPI-SP5 1.0.0.D; AMD EPYC Embedded 8004 Series - EmbGenoaPI-SP5 1.0.0.D; AMD EPYC Embedded 7003 Series - EmbMilanPI-SP3 1.0.0.D. These firmware updates are typically delivered via BIOS/UEFI updates from OEM/ODM vendors (HPE, Dell, Supermicro, Lenovo) rather than directly from AMD. Consult the AMD security bulletin at https://www.amd.com/en/resources/product-security/bulletin/AMD-SB-3034.html and your server vendor's firmware portal for platform-specific update packages. As a compensating control pending patching, restrict privileged hypervisor-level access to bare-metal EPYC hosts and audit which accounts hold the elevated privileges required to trigger this flaw. Note that SEV-SNP attestation workflows should be reviewed post-patching to confirm guest integrity measurements remain valid.
Affected VersionsENISA
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Technical ContextAI · show details
The AMD Platform Security Processor (PSP) is an ARM-based security coprocessor embedded in AMD EPYC processors that underpins AMD Secure Encrypted Virtualization (SEV), the technology used to cryptographically isolate guest VM memory from hypervisors and co-tenants. CWE-414 (Missing Lock Check) indicates the PSP firmware fails to verify that a resource is in a properly locked/protected state before acting on it - distinct from a race condition (TOCTOU), this is an absent guard that should enforce mutual exclusion or access serialization. In the SEV context, this could allow a privileged host-side attacker (e.g., a hypervisor operator) to access or manipulate PSP-managed state in a window that should be protected, bypassing the cryptographic boundary that SEV places between host and guest. Affected CPE strings span cpe:2.3:a:amd:amd_epyc™_7003_series_processors, 8004, 9004, 9005, and their Embedded counterparts, confirming the flaw exists in PSP firmware shared across multiple CPU generations (Milan, Genoa, Turin architectures).
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Severity by source
CVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:N/VI:N/VA:N/SC:N/SI:H/SA:N
Local access with high privileges required; scope changes to guest VM domain; confidentiality impact high per description despite CVSS 4.0 vector anomaly.
Primary rating from NVD.
CVSS VectorNVD
Lifecycle Timeline
2DescriptionCVE.org
Missing lock check in AMD Platform Security Processor in AMD EPYC™ 9005 Series CPUs allows a privileged attacker to potentially impact guest confidentiality via local access.
Threat Intelligence Overview
How this decision was reached
The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.
What every action level means
SSVC AssessmentENISA
Priority Score
Attack Technique
Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.
Insecure installation directory permissions in AMD chipset driver allow local authenticated attackers to achieve SYSTEM-
Local privilege escalation in the AMD Platform Configuration Blob (APCB) SMM driver, shipped in AGESA firmware across ne
Missing hardware lock bit protection on NBIO registers in AMD EPYC server processors (7003/8004/9004/9005 series, includ
Insuffient checks of the RMP on host buffer access in IOMMU may allow an attacker with privileges and a compromised HV t
Improper input validation for DIMM serial presence detect (SPD) metadata could allow an attacker with physical access, r
EUVD-2025-209510
GHSA-mwrh-fvw2-28c5
NVD
CVE.org
EPSS
Vulnrichment
VulDB
Exploit-DB