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CVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:N/VI:N/VA:N/SC:N/SI:H/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
Local access with high privileges required; scope changes to guest VM domain; confidentiality impact high per description despite CVSS 4.0 vector anomaly.
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4DescriptionCVE.org
Missing lock check in AMD Platform Security Processor in AMD EPYC™ 9005 Series CPUs allows a privileged attacker to potentially impact guest confidentiality via local access.
AnalysisAI
Missing lock check in the AMD Platform Security Processor (PSP) across multiple EPYC server CPU generations enables a locally privileged attacker to potentially compromise guest VM confidentiality, undermining AMD SEV-based isolation guarantees. Multiple series are confirmed affected - EPYC 7003, 8004, 9004, 9005, and all corresponding Embedded variants - with firmware patches now available for each. No public exploit code exists and CISA SSVC rates exploitation as 'none' with partial technical impact, consistent with the 0.01% EPSS score (2nd percentile), making this a targeted risk primarily relevant to cloud and virtualization providers relying on AMD SEV for tenant isolation.
Technical ContextAI
The AMD Platform Security Processor (PSP) is an ARM-based security coprocessor embedded in AMD EPYC processors that underpins AMD Secure Encrypted Virtualization (SEV), the technology used to cryptographically isolate guest VM memory from hypervisors and co-tenants. CWE-414 (Missing Lock Check) indicates the PSP firmware fails to verify that a resource is in a properly locked/protected state before acting on it - distinct from a race condition (TOCTOU), this is an absent guard that should enforce mutual exclusion or access serialization. In the SEV context, this could allow a privileged host-side attacker (e.g., a hypervisor operator) to access or manipulate PSP-managed state in a window that should be protected, bypassing the cryptographic boundary that SEV places between host and guest. Affected CPE strings span cpe:2.3:a:amd:amd_epyc™_7003_series_processors, 8004, 9004, 9005, and their Embedded counterparts, confirming the flaw exists in PSP firmware shared across multiple CPU generations (Milan, Genoa, Turin architectures).
RemediationAI
Vendor-released firmware patches are available for all affected families. Apply the following PSP firmware updates per platform: AMD EPYC 9005 Series - TurinPI_1.0.0.8; AMD EPYC 9004 Series - GenoaPI_1.0.0.H; AMD EPYC 8004 Series - GenoaPI_1.0.0.H; AMD EPYC 7003 Series - MilanPI-SP3_1.0.0.J; AMD EPYC Embedded 9005 Series - EmbeddedTurinPI_SP5_1004; AMD EPYC Embedded 9004 Series - EmbGenoaPI-SP5 1.0.0.D; AMD EPYC Embedded 8004 Series - EmbGenoaPI-SP5 1.0.0.D; AMD EPYC Embedded 7003 Series - EmbMilanPI-SP3 1.0.0.D. These firmware updates are typically delivered via BIOS/UEFI updates from OEM/ODM vendors (HPE, Dell, Supermicro, Lenovo) rather than directly from AMD. Consult the AMD security bulletin at https://www.amd.com/en/resources/product-security/bulletin/AMD-SB-3034.html and your server vendor's firmware portal for platform-specific update packages. As a compensating control pending patching, restrict privileged hypervisor-level access to bare-metal EPYC hosts and audit which accounts hold the elevated privileges required to trigger this flaw. Note that SEV-SNP attestation workflows should be reviewed post-patching to confirm guest integrity measurements remain valid.
Local privilege escalation in the AMD Platform Configuration Blob (APCB) SMM driver, shipped in AGESA firmware across ne
Missing hardware lock bit protection on NBIO registers in AMD EPYC server processors (7003/8004/9004/9005 series, includ
Insuffient checks of the RMP on host buffer access in IOMMU may allow an attacker with privileges and a compromised HV t
Improper input validation for DIMM serial presence detect (SPD) metadata could allow an attacker with physical access, r
Same weakness CWE-414 – Missing Lock Check
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External POC / Exploit Code
Leaving vuln.today
EUVD-2025-209510
GHSA-mwrh-fvw2-28c5