Amd Epyc Embedded 9005 Series Processors
Monthly
Improper access control in the IOMMU register interface on AMD EPYC server processors allows a high-privileged local attacker to induce non-coherent memory accesses by the AMD Secure Processor (ASP), resulting in loss of system integrity beyond the directly compromised component. Affected processor families span EPYC 8004, 9004, and 9005 series - including embedded variants - covering AMD's current-generation server and embedded datacenter platforms. No public exploit code and no CISA KEV listing exist at time of analysis, but the elevated subsequent integrity impact (SI:H in CVSS 4.0) signals meaningful security boundary degradation, particularly relevant for confidential computing and virtualized environments where ASP integrity is foundational.
Privilege escalation into the AMD Secure Processor affects AMD EPYC 8004/9004/9005 and EPYC Embedded 8004/9004/9005 series processors, where missing lock bit protection on NBIO registers lets a local admin-privileged attacker gain arbitrary System Management Network (SMN) access. This can lead to arbitrary code execution inside the AMD Secure Processor (ASP) and breaks the confidentiality and integrity guarantees SEV-SNP is supposed to provide to confidential-computing guests. There is no public exploit identified at time of analysis, EPSS risk is negligible (0.01%), and CISA SSVC rates exploitation as none but technical impact as total.
Missing hardware lock bit protection on NBIO registers in AMD EPYC server processors (7003/8004/9004/9005 series, including embedded variants) allows a local admin-privileged attacker to reconfigure MMIO routing, undermining SEV-SNP guest integrity guarantees. The vulnerability is significant in confidential computing contexts where SEV-SNP is deployed to protect tenant workloads from potentially malicious host operators - precisely the trust boundary AMD's hardware security feature is designed to enforce. No public exploit exists and EPSS (0.01%, 2nd percentile) combined with SSVC exploitation status of 'none' indicate negligible near-term mass exploitation risk; however, targeted abuse by privileged insiders or compromised hypervisor hosts is the realistic concern.
Local privilege escalation in the AMD Platform Configuration Blob (APCB) SMM driver, shipped in AGESA firmware across nearly the entire modern AMD EPYC, Ryzen, Threadripper, and Instinct MI300 line, lets a Ring 0 attacker escalate into System Management Mode (SMM) and potentially run arbitrary code below the operating system. The flaw stems from the SMM driver improperly invoking UEFI boot services, and AMD-reported it with a CVSS 4.0 base of 7.1; there is no public exploit identified at time of analysis and EPSS is negligible at 0.01%. Because SMM code runs at a higher trust level than the OS kernel, successful exploitation can undermine firmware integrity and any SMM-based security guarantees.
Missing lock check in the AMD Platform Security Processor (PSP) across multiple EPYC server CPU generations enables a locally privileged attacker to potentially compromise guest VM confidentiality, undermining AMD SEV-based isolation guarantees. Multiple series are confirmed affected - EPYC 7003, 8004, 9004, 9005, and all corresponding Embedded variants - with firmware patches now available for each. No public exploit code exists and CISA SSVC rates exploitation as 'none' with partial technical impact, consistent with the 0.01% EPSS score (2nd percentile), making this a targeted risk primarily relevant to cloud and virtualization providers relying on AMD SEV for tenant isolation.
Improper access control in the IOMMU register interface on AMD EPYC server processors allows a high-privileged local attacker to induce non-coherent memory accesses by the AMD Secure Processor (ASP), resulting in loss of system integrity beyond the directly compromised component. Affected processor families span EPYC 8004, 9004, and 9005 series - including embedded variants - covering AMD's current-generation server and embedded datacenter platforms. No public exploit code and no CISA KEV listing exist at time of analysis, but the elevated subsequent integrity impact (SI:H in CVSS 4.0) signals meaningful security boundary degradation, particularly relevant for confidential computing and virtualized environments where ASP integrity is foundational.
Privilege escalation into the AMD Secure Processor affects AMD EPYC 8004/9004/9005 and EPYC Embedded 8004/9004/9005 series processors, where missing lock bit protection on NBIO registers lets a local admin-privileged attacker gain arbitrary System Management Network (SMN) access. This can lead to arbitrary code execution inside the AMD Secure Processor (ASP) and breaks the confidentiality and integrity guarantees SEV-SNP is supposed to provide to confidential-computing guests. There is no public exploit identified at time of analysis, EPSS risk is negligible (0.01%), and CISA SSVC rates exploitation as none but technical impact as total.
Missing hardware lock bit protection on NBIO registers in AMD EPYC server processors (7003/8004/9004/9005 series, including embedded variants) allows a local admin-privileged attacker to reconfigure MMIO routing, undermining SEV-SNP guest integrity guarantees. The vulnerability is significant in confidential computing contexts where SEV-SNP is deployed to protect tenant workloads from potentially malicious host operators - precisely the trust boundary AMD's hardware security feature is designed to enforce. No public exploit exists and EPSS (0.01%, 2nd percentile) combined with SSVC exploitation status of 'none' indicate negligible near-term mass exploitation risk; however, targeted abuse by privileged insiders or compromised hypervisor hosts is the realistic concern.
Local privilege escalation in the AMD Platform Configuration Blob (APCB) SMM driver, shipped in AGESA firmware across nearly the entire modern AMD EPYC, Ryzen, Threadripper, and Instinct MI300 line, lets a Ring 0 attacker escalate into System Management Mode (SMM) and potentially run arbitrary code below the operating system. The flaw stems from the SMM driver improperly invoking UEFI boot services, and AMD-reported it with a CVSS 4.0 base of 7.1; there is no public exploit identified at time of analysis and EPSS is negligible at 0.01%. Because SMM code runs at a higher trust level than the OS kernel, successful exploitation can undermine firmware integrity and any SMM-based security guarantees.
Missing lock check in the AMD Platform Security Processor (PSP) across multiple EPYC server CPU generations enables a locally privileged attacker to potentially compromise guest VM confidentiality, undermining AMD SEV-based isolation guarantees. Multiple series are confirmed affected - EPYC 7003, 8004, 9004, 9005, and all corresponding Embedded variants - with firmware patches now available for each. No public exploit code exists and CISA SSVC rates exploitation as 'none' with partial technical impact, consistent with the 0.01% EPSS score (2nd percentile), making this a targeted risk primarily relevant to cloud and virtualization providers relying on AMD SEV for tenant isolation.