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Ingenic T31 SoC CVE-2026-50720

| EUVDEUVD-2026-62480 MEDIUM
Improper Verification of Cryptographic Signature (CWE-347)
2026-08-19 mitre GHSA-gpwr-rgpw-7w8q
6.4
CVSS 3.1 · Vendor: mitre
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Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Recon
    Obtain physical custody of T31-based device
  2. Delivery
    Access or remove boot media
  3. Exploit
    Write forged SPL image to boot media
  4. Install
    Reinstall media and power device
  5. C2
    Boot ROM accepts forged image via 32-bit partial comparison (~2/3 success rate)
  6. Execute
    Unsigned attacker payload executes at earliest boot stage
  7. Impact
    Persistent full-device firmware compromise established

Vulnerability Assessment

Weakness
CWE
OWASP Top 10:2025
A04:2025 - Cryptographic Failures
ASVS 5.0
V11 - Cryptography Signature verification
Exploitation Conditions

Exploitation requires physical write access to the boot media (NAND flash, eMMC, or SD card) of an Ingenic T31-based device - this is the absolute prerequisite and cannot be circumvented remotely. The flash-boot verification path must be the active boot mode on the target device; devices booting exclusively from paths not subject to this ROM verification would not be affected. The attacker must be capable of constructing a syntactically valid forged SPL; due to the ~2/3 per-attempt success rate, typically one or two write-and-boot cycles suffice, requiring no cryptographic key material. No software authentication credentials, network access, or OS-level privileges are required. Exploitation is limited to actors who can obtain physical custody of target hardware, making supply chain interception, insider threat, or theft of deployed devices the primary threat vectors. The CVSS PR:N rating reflects the absence of software-level privilege requirements, not an absence of access barriers.

Impact

CVSS AV:P correctly limits the threat surface to actors with physical access to boot media, ruling out remote or network exploitation entirely - the EPSS score of 0.15% at the 5th percentile accurately reflects this constraint. AC:H captures the specialized knowledge required to reverse-engineer the T31 boot ROM and construct a valid forged SPL, though the ~2/3 per-attempt success rate means the cryptographic forgery step itself is nearly trivial once that expertise is applied. CIA impact is correctly rated H/H/H because successful exploitation yields unsigned firmware execution at the earliest boot stage, below any OS-level security control. This vulnerability is not in CISA KEV and EPSS is low, but organizations operating fleets of T31-based IoT cameras should not dismiss it on CVSS score alone - supply chain interception, shipping custody gaps, and unsecured physical installations are realistic threat vectors for networked camera deployments. The CPE field in available structured data is 'n/a', meaning the affected product scope beyond the confirmed T31X cannot be formally bounded; other Ingenic T31 SKUs (T31L, T31A, T31N) sharing the same boot ROM should be treated as potentially affected pending vendor clarification. EUVD tags ('JWT Attack', 'Information Disclosure') are clearly erroneous enrichment for this vulnerability and should be disregarded in any risk characterization.

Exploit ScenarioDerived

An attacker who obtains brief physical custody of a deployed T31-based IP camera - during shipping, a maintenance window, or via access to an unsecured installation - removes or directly accesses the boot media, writes a modified SPL image containing a persistent backdoor, and returns the device to service. On next boot, the ROM compares only 4 bytes of the RSA signature output against 4 bytes of the digest; with ~2/3 probability the forged image passes, executing unsigned attacker-controlled firmware - typically succeeding within one or two attempts. The malicious firmware runs persistently below the OS, surviving factory resets, and may exfiltrate video feeds or enable lateral movement into the local network.

This Month Plan within 30 days. Why: MEDIUM severity (CVSS 4.0-6.9).
No patch listed yet 0.1% exploitation probability (EPSS)

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AnalysisAIv1 – Aug 24, 2026

Secure boot bypass in the Ingenic T31 SoC allows an attacker with physical write access to boot media to forge SPL (Secondary Program Loader) images that pass RSA signature verification without the OEM signing key. The boot ROM's flash-boot verification path compares only a single 32-bit word of the RSA signature output against a single 32-bit word of the SHA-256 payload digest - rather than validating the full cryptographic outputs - yielding a forgery success rate of approximately 2/3 per attempt. End-to-end hardware acceptance of a forged firmware image on a Wyze Video Doorbell v2 (T31X) has been confirmed by external researchers at opensensor.io; no public exploit is confirmed in CISA KEV, but a working proof-of-concept exists per the researcher disclosure.

RemediationAI

No vendor-released patch has been identified at time of analysis for this boot ROM vulnerability; the flaw resides in mask ROM and cannot be corrected via software update in deployed hardware. For affected Ingenic T31-based devices, primary remediation is physical security hardening: restrict physical access to deployed devices, implement tamper-evident sealing on enclosures, and audit supply chain custody to detect potential interception during shipping. Device operators should inventory T31-based IoT cameras in their fleet and evaluate whether their physical security posture adequately mitigates boot media tampering risk. Where platform-level Ingenic security features exist (e.g., eFuse-based boot restrictions or additional verification hooks in downstream bootloader stages), these should be enabled as compensating controls, noting that they cannot fully remediate the boot ROM flaw itself. Contact Ingenic directly for guidance on affected SKUs and any planned mitigations in future silicon revisions. The researcher disclosure at https://opensensor.io/security/ingenic-t31-bootrom-partial-verification provides technical detail for internal assessment.

Affected VersionsENISA

n/a n/a

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Technical ContextAI · show details

The Ingenic T31 is an embedded SoC used in consumer IoT cameras and video devices; the T31X variant is confirmed present in the Wyze Video Doorbell v2. Its boot ROM implements a secure boot chain in which the SPL must pass RSA signature verification before execution is permitted. CWE-347 (Improper Verification of Cryptographic Signature) precisely describes the root cause: the flash-boot verification routine compares only one 32-bit word of the RSA signature computation output against one 32-bit word of the SHA-256 payload digest, instead of comparing the full RSA output (typically 256 bytes for RSA-2048) against the full 32-byte SHA-256 digest as embedded in PKCS#1 v1.5 padding. This reduces the effective entropy of the check from 256 bytes to 4 bytes. Because an attacker can freely craft payload content and retry, the ~2/3 per-attempt success rate makes cryptographic forgery achievable in one or two boot attempts. The vulnerability was validated via reverse engineering of the boot ROM, software emulation against known-good vendor-signed images, and confirmed physical hardware acceptance of a forged image.

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Severity by source

Vendor (mitre) PRIMARY 6.4 MEDIUM
AV:P/AC:H/PR:N/UI:N/S:U/C:H/I:H/A:H
vuln.today AI 6.4 MEDIUM

Physical boot media write access required (AV:P); specialized embedded RE expertise needed (AC:H); no software privileges required (PR:N); full firmware compromise yields complete CIA impact (C:H/I:H/A:H).

3.1 AV:P/AC:H/PR:N/UI:N/S:U/C:H/I:H/A:H
4.0 AV:P/AC:H/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N

Primary rating from Vendor (mitre).

CVSS VectorVendor: mitre

Attack Vector
Physical
Attack Complexity
High
Privileges Required
None
User Interaction
None
Scope
Unchanged
Confidentiality
High
Integrity
High
Availability
High

Lifecycle Timeline

2
CVSS changed
Aug 24, 2026 - 20:22 NVD
6.4 (MEDIUM)
CVE Published
Aug 19, 2026 - 00:00 cve.org
UNKNOWN (no severity yet)

DescriptionCVE.org

The Ingenic T31 SoC boot ROM flash-boot verification path compares only a single 32-bit word of the RSA signature output against a single 32-bit word of the SHA-256 payload digest, rather than compare the full data. This allows an attacker with physical write access to boot media to forge modified SPL (Secondary Program Loader) images that pass secure boot verification without possession of the OEM signing key. Each forgery attempt succeeds with approximately 2/3 probability. This has been validated via reverse engineering, software emulation against vendor-signed images, and end-to-end hardware acceptance of a forged firmware image on a Wyze Video Doorbell v2 (T31X).

Threat Intelligence Overview

EPSS Score
0.1%
Top 95% exploitable
Prevalence
Low
niche IoT camera SoC, limited to consumer device segment
Data Quality
5 sources
Confidence: Medium

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity MEDIUM
CISA KEV No
Public POC No
EPSS 0.1%
Patch available No
Active threat No
Deciding rule
MEDIUM severity (CVSS 4.0-6.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision· derived
Defer
Exploitation· derived
None
System Exposure· derived
Small
Automatable· derived
No
Human Impact· derived
Medium

Priority Score

32
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +32
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.

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