Attack ChainAIDerived
Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain
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AccessGain privileged access on HPS non-secure OS
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DeliveryCraft malicious secure-monitor/SMC request
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ExploitTrigger stack overflow in Trusted Firmware (EL3)
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ExecutionCorrupt secure-world control flow
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ImpactExecute code or deny secure services
Vulnerability Assessment
| Weakness |
CWE
ASVS 5.0
V15 - Secure Coding and Architecture Stack buffer bounds checking
MITRE ATT&CK
1 technique across 1 tactic: Execution The technique list with ATT&CK links and the kill-chain view is part of the Basic plan and up. |
| Exploitation Conditions | Requires local, high-privileged execution on the Altera SoC FPGA Hard Processor System (HPS) - realistically control of the non-secure/rich OS (e.g., root or kernel on the ARM cores) that can invoke the secure-monitor interface into Trusted Firmware. Exploitation is limited by the need for that pre-existing privileged foothold (PR:H, AV:L, no remote/network path) and by the narrow deployment: only devices running the Altera SoCFPGA Trusted Firmware port up to and including socfpga_v2.14.0 are affected. No user interaction is required (UI:N). This is a privilege/trust-boundary escalation into the secure world, not a remotely exploitable default-configuration flaw. |
| Impact | This is a genuine but access-gated risk. The CVSS 4.0 vector (AV:L/AC:L/AT:N/PR:H/UI:N) confirms a LOCAL attack vector requiring HIGH privileges, so this is not a remotely-reachable, low-effort flaw - the attacker must already hold a privileged foothold on the Hard Processor System (typically the rich/non-secure OS kernel making SMC calls into secure firmware). What makes it serious despite the local vector is where the corruption lands: Trusted Firmware runs in the secure world (ARM EL3/monitor), so a stack overflow there crosses a trust boundary. This is reflected in the subsequent-system metrics (SC:L/SI:H/SA:H) and vendor score of 8.3 (HIGH). No EPSS score, KEV listing, or POC was provided in the intelligence, and the only reference is the vendor's own advisory (Altera asa-0006), meaning there is no independent signal of active or imminent exploitation - this reads as a vendor-disclosed hardening issue, not an in-the-wild threat. Net: prioritize for affected SoC FPGA fleets because the impact (secure-world integrity/availability compromise) is high, but the PR:H gate and niche footprint mean it is targeted/embedded-device risk rather than mass-exploitation risk. |
| Exploit ScenarioDerived | An attacker who has already achieved privileged code execution in the non-secure world (e.g., compromised Linux kernel/root on the HPS) issues a crafted request across the secure-monitor interface into Altera Trusted Firmware, overflowing a stack buffer in the EL3 secure firmware. This corrupts secure-world control flow, enabling code execution or a persistent denial of the secure services the platform depends on. No public exploit code was identified at time of analysis, and the local, high-privilege prerequisite makes this a post-compromise escalation rather than an initial-access vector. |
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Alert meAnalysisAIv1 – Sep 24, 2026
A stack-based buffer overflow in Altera's Trusted Firmware port for SoC FPGA devices (the SoCFPGA branch through socfpga_v2.14.0) lets a local attacker who already controls the non-secure rich OS - root or kernel on the HPS ARM cores - corrupt the secure monitor's stack via the SMC interface and potentially escalate across the trust boundary into the secure world. The assessed vector (CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:L/I:H/A:H) confirms this is an access-gated privilege/trust-boundary escalation requiring an existing high-privileged foothold, not a remotely reachable default-configuration flaw; impact to integrity and availability is high and scope is changed, but confidentiality impact is limited. No public exploit code has been identified at time of analysis and the issue is not confirmed as actively exploited (not in CISA KEV).
RemediationAI
No vendor-released patch version is identified in the available data at time of analysis, so the primary action is to treat Altera security advisory ASA-0006 (https://www.altera.com/product-security/advisory/asa-0006) as the authoritative source and track it for a fixed Trusted Firmware SoCFPGA release above socfpga_v2.14.0, then upgrade the secure-world firmware on all affected HPS devices and re-provision secure boot as directed. Until a fixed build is available, apply compensating controls that address the PR:H/AV:L prerequisite: strictly limit who can obtain root or kernel-level execution on the non-secure rich OS, since that foothold is the gateway to the SMC interface - this has the trade-off of constraining legitimate administrative workflows and does not help if the rich OS is already compromised. Disable or fuse off JTAG/debug access on production devices to remove an alternate path to privileged execution, accepting reduced field-debugging capability. Harden the secure-boot chain so a corrupted or replaced Trusted Firmware image cannot persist, and monitor/instrument SMC call patterns from the non-secure world for malformed or fuzzing-like requests, accepting added logging overhead and the risk of false positives. Because scope change lets a successful overflow cross into the secure world, any deployment relying on the secure monitor for key protection or attestation should assume that a compromised non-secure OS weakens that separation until the firmware is patched.
Affected VersionsENISA
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Technical ContextAI · show details
Altera SoC FPGA devices pair FPGA fabric with a Hard Processor System (HPS) containing ARM cores that run a rich (non-secure) operating system alongside ARM Trusted Firmware-A (TF-A), the reference secure-world firmware that executes at the highest exception level (EL3) as the BL31 secure monitor. Non-secure software communicates with the secure monitor through the SMC (Secure Monitor Call) interface, which marshals arguments into the firmware's own stack. CWE-121 (Stack-based Buffer Overflow) indicates that a fixed-size stack buffer inside the Trusted Firmware SoCFPGA port is populated from caller-supplied data without adequate bounds validation, so a malformed request can overflow the buffer and corrupt adjacent stack memory - return addresses, saved registers, or control structures belonging to the secure-world execution context. The affected CPE (cpe:2.3:a:altera:trusted_firmware:*:*:*:*:*:*:*:*) applies to the Trusted Firmware project as shipped by Altera, and the CVSS 4.0 vector supplied by the vendor (AV:L/AC:L/AT:N/PR:H/UI:N, high VC/VI/VA and high subsequent-system impacts) matches the local, highly privileged, no-user-interaction nature of an SMC-reachable memory-corruption bug in the secure monitor. Because scope is changed in the assessed vector, successful exploitation crosses from the non-secure world into the secure world, making this fundamentally a trust-boundary integrity and availability issue rather than a straightforward information-disclosure bug.
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Severity by source
CVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:L/VI:H/VA:H/SC:L/SI:H/SA:H
Local vector requiring privileged non-secure caller into secure firmware (PR:H, AV:L); overflow in EL3 crosses the secure trust boundary (S:C) with high integrity/availability and low confidentiality impact.
Primary rating from Vendor (Altera).
CVSS VectorVendor: Altera
DescriptionCVE.org
Stack-based buffer overflow vulnerability in Altera Trusted Firmware on HPS allows Exploitation of Improperly Configured or Implemented Memory Protections.
This issue affects Trusted Firmware: through socfpga_v2.14.0.
Executive ViewAI
Altera SoC FPGA devices running the Trusted Firmware SoCFPGA branch through socfpga_v2.14.0 face a high-severity trust-boundary escalation that requires an attacker to already control root or kernel privileges on the HPS ARM cores. A successful exploit could compromise the integrity and availability of secure-world operations, so organizations using these devices in fielded or in-development products should treat it as a material risk. Leadership should care because no vendor-released patch has been identified, and exploitation could undermine the security assurances customers rely on for those products.
No vendor-released patch identified at time of analysis; restrict root/kernel access on HPS ARM cores, enforce least privilege, disable or tightly control SMC/debug interfaces where feasible, enable secure boot and measured boot, monitor Altera advisories and SMC/secure-monitor logs, and isolate affected SoC FPGA devices from untrusted local users.
Threat Intelligence Overview
How this decision was reached
The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.
What every action level means
SSVC AssessmentENISA
Priority Score
Attack Technique
A buffer overflow occurs when a program writes more data to a memory buffer than it was allocated to hold, causing the excess data to spill into adjacent memory regions.
A stack-based buffer overflow occurs when a program writes more data to a buffer located on the stack than it was allocated to hold.
More in Trusted Firmware
View allA stack-based buffer overflow in Altera Trusted Firmware (the ARM Trusted Firmware-A port for Altera/Intel SoC FPGA Hard
Local, high-privileged attackers who can invoke the ARM Trusted Firmware secure-monitor interface on Altera SoCFPGA Hard
Privileged local code running in the non-secure world of an Altera SoC FPGA HPS device can make Altera Trusted Firmware
Out-of-bounds read in Altera Trusted Firmware for SoCFPGA hard processor systems (all builds through socfpga_v2.14.0) le
Local privilege escalation in Altera Trusted Firmware (TF-A) on socfpga Hard Processor Systems lets an attacker who alre
Privilege-gated out-of-bounds write in Altera Trusted Firmware (the SoCFPGA port of ARM Trusted Firmware-A) through socf
Buffer overflow in Altera Trusted Firmware (ARM Trusted Firmware-A) running on the Hard Processor System (HPS) of socfpg
Same weakness CWE-121 – Stack-based Buffer Overflow
View allSame technique Buffer Overflow
View allVendor StatusVendor
SUSE
| Product | Status |
|---|---|
| SUSE Liberty Linux 10 | Fixed |
EUVD-2026-85922
GHSA-cph2-7c5g-g7pg
NVD
CVE.org
EPSS
Vulnrichment
Exploit-DB