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Altera Trusted Firmware EUVDEUVD-2026-85927

| CVE-2026-58006 HIGH
Untrusted Pointer Dereference (CWE-822)
2026-09-24 Altera GHSA-72h2-wwh5-8975
8.3
CVSS 4.0 · Vendor: Altera
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Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Access
    Gain privileged normal-world code execution on HPS
  2. Delivery
    Invoke firmware interface with crafted pointer
  3. Exploit
    Trusted Firmware dereferences untrusted pointer
  4. Execution
    Bypass secure memory protections
  5. Impact
    Corrupt secure-world firmware integrity/availability

Vulnerability Assessment

Weakness
CWE
ASVS 5.0
V15 - Secure Coding and Architecture Untrusted pointer prevention
Exploitation Conditions

Requires the attacker to already possess high privileges (PR:H) with local access (AV:L) in the normal/non-secure world of an Altera socfpga HPS device running Trusted Firmware at or below socfpga_v2.14.0; exploitation then abuses a firmware code path that dereferences an attacker-supplied pointer where memory protections are improperly configured or implemented. Limiting factors: no remote vector, no unauthenticated path, and no user interaction is involved - but the pre-requisite privileged foothold on the embedded SoC substantially narrows the realistic attacker set to those who have already compromised the running system or supply chain.

Impact

This is a genuinely serious flaw within its narrow scope but not a broad-fleet emergency. The CVSS 4.0 vector (AV:L/AC:L/AT:N/PR:H/UI:N) shows the core limiter clearly: exploitation is LOCAL and requires HIGH privileges (PR:H) - the attacker must already hold a privileged position in the normal-world (non-secure) execution environment of the SoC before triggering the untrusted pointer dereference in the ARM Trusted Firmware secure monitor. What elevates severity is the scope/trust-boundary crossing: subsequent-system integrity and availability are High (SI:H/SA:H), reflecting that a normal-world compromise propagates into the secure firmware, with confidentiality only Low (VC:L/SC:L). There is NO EPSS score, NO CISA KEV listing, and NO public POC in the provided data - so this is 'no public exploit identified at time of analysis,' not confirmed exploitation. Signals are internally consistent (no network-vs-local conflict), so the 8.3 is a defensible base score, but the PR:H + AV:L combination means real-world risk is confined to attackers who already have privileged code execution on the FPGA SoC. This is a high-value but low-likelihood, targeted/embedded-supply-chain concern rather than a mass-exploitation priority.

Exploit ScenarioDerived

An attacker who has already gained privileged code execution in the normal world of an Altera/Intel socfpga HPS (e.g. a compromised OS/bootloader component) invokes a firmware interface that passes an attacker-controlled pointer, which the Trusted Firmware dereferences without validating it against secure memory protections. By steering that dereference the attacker corrupts or influences secure-world firmware state, crossing the normal→secure trust boundary to gain integrity/availability impact over the secure monitor. No public POC or exploit code is identified in the available data.

This Week Schedule remediation this week. Why: HIGH severity (CVSS 7.0-8.9).
No patch listed yet 0.1% exploitation probability (EPSS)

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AnalysisAIv1 – Sep 24, 2026

Privileged local code running in the non-secure world of an Altera SoC FPGA HPS device can make Altera Trusted Firmware dereference an attacker-supplied pointer, corrupting firmware memory protections and crossing the normal/secure-world boundary in all releases up to and including socfpga_v2.14.0. Rated CVSS 8.3 (v4.0) with high integrity and availability impact, the flaw is real but narrow in scope: exploitation requires an already-high-privileged, locally-positioned attacker (PR:H, AV:L, no user interaction), so realistic exposure is limited to actors who have already compromised the running system or its supply chain. No public exploit code has been identified at time of analysis, and neither CISA KEV listing, EPSS score, nor a confirmed patched version was provided in the available data.

RemediationAI

No vendor-released patch version was identified in the available data; the affected range is stated as everything through socfpga_v2.14.0, which implies a fix in a later socfpga tag, but the specific fixed version must be confirmed against Altera Product Security Advisory ASA-0006 (https://www.altera.com/product-security/advisory/asa-0006) before upgrading. Until a patched Trusted Firmware build is available and validated, treat the following as compensating controls, each with a trade-off: enforce a secure boot chain and authenticate the bootloader/firmware image so an attacker with normal-world privileges cannot swap in modified firmware (requires key provisioning and can complicate field recovery); lock down and disable unused debug and JTAG/test interfaces, which is one of the most practical mitigations for HPS-class devices but removes a useful bring-up path; tighten the non-secure world's privilege model and isolate/contain any component allowed to issue secure-monitor calls, reducing who can reach the vulnerable code path at the cost of re-architecting trusted services; and ensure MMU/SMMU/MPU translation and isolation settings are reviewed and enforced so out-of-range pointers from the normal world fault rather than being silently dereferenced. Because exploitation presupposes a privileged local foothold, hardening normal-world access, restricting shell/console and physical access, and monitoring for anomalous secure-monitor activity materially reduce exposure, but none of these substitute for a vendor firmware update.

Affected VersionsENISA

Trusted Firmware 0 ≤socfpga_v2.14.0

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Technical ContextAI · show details

The affected component is Altera's port of Trusted Firmware (Trusted Firmware-A style secure firmware) for the Hard Processor System (HPS) in SoC FPGA devices, per CPE cpe:2.3:a:altera:trusted_firmware. The root cause is CWE-822, Untrusted Pointer Dereference: a firmware code path accepts a pointer that originates from the less-trusted (normal-world) context and dereferences it without validating that it lies within an allowed memory region. Because the firmware's memory protections (MMU/MPU/SMMU-style translation and isolation configuration) are improperly configured or implemented, that dereference is not trapped, allowing the caller to read or write memory that should belong to the secure firmware - the described 'Exploitation of Improperly Configured or Implemented Memory Protections'. The CVSS 4.0 vector (AV:L/AC:L/AT:N/PR:H/UI:N/VC:L/VI:H/VA:H) shows a local, low-complexity, high-privilege-only vector with no user interaction; our independent CVSS 3.1 assessment (AV:L/AC:L/PR:H/UI:N/S:C/C:L/I:H/A:H) agrees and additionally scores the impact as scope-changing, reflecting the secure/non-secure boundary being crossed. No remote or unauthenticated path is involved.

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Severity by source

Vendor (Altera) PRIMARY 8.3 HIGH
CVSS:4.0/AV:L/AC:L/AT:N/PR:H/UI:N/VC:L/VI:H/VA:H/SC:L/SI:H/SA:H
vuln.today AI 8.1 HIGH

Local high-privilege normal-world attacker (AV:L/PR:H) crosses into secure firmware (S:C) with high integrity/availability but only low confidentiality impact.

3.1 AV:L/AC:L/PR:H/UI:N/S:C/C:L/I:H/A:H
4.0 AV:L/AC:L/AT:N/PR:H/UI:N/VC:L/VI:H/VA:H/SC:L/SI:H/SA:H

Primary rating from Vendor (Altera).

CVSS VectorVendor: Altera

Attack Vector
Local
Attack Complexity
Low
Attack Requirements
None
Privileges Required
High
User Interaction
None
Vulnerable system: Confidentiality
Low
Vulnerable system: Integrity
High
Vulnerable system: Availability
High
Subsequent system: Confidentiality
Low
Subsequent system: Integrity
High
Subsequent system: Availability
High

DescriptionCVE.org

Untrusted pointer dereference vulnerability in Altera Trusted Firmware on HPS allows Exploitation of Improperly Configured or Implemented Memory Protections.

This issue affects Trusted Firmware: through socfpga_v2.14.0.

Executive ViewAI

Why It Matters

Altera SoC FPGA HPS devices running Altera Trusted Firmware up to and including socfpga_v2.14.0 face a high-severity flaw that could let a locally positioned, highly privileged actor undermine secure-world separation and corrupt firmware protections. The practical exposure is limited because exploitation requires an already high-privileged local position, but a successful attack could damage firmware integrity and availability in embedded or secure workloads. No public exploit identified at time of analysis and no vendor-released patch identified at time of analysis, so leadership should prioritize inventory, privilege restriction, and vendor coordination.

Business Impact: High
Compensating Controls

No vendor-released patch identified at time of analysis; enforce least privilege, restrict and monitor local privileged access to affected Altera SoC FPGA HPS devices, segment affected systems, validate supply-chain integrity, and engage Altera for a fixed release.

Threat Intelligence Overview

EPSS Score
0.1%
Top 99% exploitable
Prevalence
Low
niche Altera/Intel socfpga FPGA SoC firmware, industry-specific embedded footprint
Data Quality
4 sources
Confidence: Medium

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity HIGH
CISA KEV No
Public POC No
EPSS 0.1%
Patch available No
Active threat No
Deciding rule
HIGH severity (CVSS 7.0-8.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision
Defer
Exploitation
None
System Exposure· derived
Small
Automatable
No
Human Impact
High
Technical Impact
Partial

Priority Score

42
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +42
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.

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