AMD EPYC Processors EUVD-2025-210086

CWE-1262 (Improper Access Control for Register Interface) describes hardware-level flaws where a software or firmware interface to a hardware register block fails to enforce appropriate privilege or isolation boundaries. In this case, the IOMMU - the hardware unit responsible for virtualizing and constraining DMA access by devices and subsystems - exposes a register interface that does not adequately restrict write access. The AMD Secure Processor (ASP, formerly PSP) is an ARM-based co-processor embedded in EPYC chips that manages firmware trust, secure boot, memory encryption (SME/SEV), and other security-critical functions. By manipulating IOMMU registers, a privileged attacker can cause the ASP to perform non-coherent memory accesses - reads or writes that bypass cache coherency protocols - potentially exposing or corrupting data the ASP is operating on without the ASP's knowledge. The attack requires AT:P (Additional Technology/conditions Present) per the CVSS 4.0 vector, indicating a prerequisite configuration or platform state is needed. Affected CPEs cover cpe:2.3:a:amd:amd_epyc™_9004_series_processors, 9005, 8004, and their embedded equivalents.