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Zephyr NPCX eSPI CVE-2026-78119

| EUVDEUVD-2026-107486 MEDIUM
Out-of-bounds Write (CWE-787)
2026-10-21 zephyr
6.3
CVSS 3.1 · Vendor: zephyr
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Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Access
    Gain host firmware or eSPI bus control
  2. Delivery
    Emit TAF write/RPMC request with oversized length field
  3. Exploit
    Overflow fixed 16-word src buffer in espi_taf_parse()
  4. Execution
    Write ~956 bytes past buffer into .bss
  5. Impact
    Corrupt flash-protection state, leak SRAM, or crash controller

Vulnerability Assessment

Weakness
CWE
ASVS 5.0
V15 - Secure Coding and Architecture Bounds checking, write limits
MITRE ATT&CK

2 techniques across 2 tactics: Execution, Privilege Escalation

The technique list with ATT&CK links and the kill-chain view is part of the Basic plan and up.

Exploitation Conditions

Exploitable only when CONFIG_ESPI_TAF is enabled on a Nuvoton NPCX/NPCK SoC target (no in-tree Zephyr board enables this by default), and only via a TAF write or RPMC OP1 flash request whose 12-bit header length field exceeds the negotiated eSPI receive payload size (rx-plsize, 64 bytes on all in-tree SoCs). The attacker must control the eSPI host at the firmware or bus level, not merely run software on the host; a compliant maximum-length (64-byte) write fits the buffer exactly and is processed safely. Primary limiting factors: non-default build configuration, specific Nuvoton hardware, and the requirement for host-firmware/bus-level control rather than ordinary host access.

Impact

This is a medium-severity (CVSS 6.3) out-of-bounds write (CWE-787) whose real-world priority is constrained by its access requirements rather than its impact. The CVSS vector CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:U/C:L/I:H/A:H correctly captures the key limiter: AV:L and PR:H mean exploitation is not reachable from ordinary host software or over a network - the description explicitly states it requires host firmware or bus-level control over the eSPI link, which is a substantial barrier. No EPSS score, KEV listing, or POC was provided in the intelligence, so this is no public exploit identified at time of analysis and there is no evidence of active or widespread exploitation. The impact is genuine where exploitable (I:H/A:H from .bss corruption that can disable flash protection regions, plus C:L from leaking adjacent controller SRAM into host-readable flash), and it crosses the exact trust boundary TAF exists to enforce. Weighing the signals together: this is a real, well-characterized memory-corruption flaw but a conditional, high-privilege, local-bus one - a priority for high-assurance embedded/EC deployments that enable TAF, but low operational urgency for the vast majority of environments. No signals conflict; the main gap is the absence of EPSS/KEV/POC data, which is consistent with a hardware-adjacent, non-default-configuration vulnerability.

Exploit ScenarioDerived

A malicious or compromised eSPI host (host firmware or a device with bus-level control) emits a Target-Attached-Flash write or RPMC OP1 request whose 12-bit header length field claims a payload larger than the negotiated 64-byte rx-plsize. The embedded controller's espi_taf_parse() copies up to 239 extra 32-bit words past the fixed 16-word src buffer, corrupting roughly 956 bytes of .bss and potentially leaking adjacent controller SRAM into host-chosen flash the attacker can read back. No public POC was identified; exploitation requires crafting a non-compliant TAF request, which is low-complexity once bus/firmware control is held.

This Month Plan within 30 days. Why: MEDIUM severity (CVSS 4.0-6.9).
Patch available 0.1% exploitation probability (EPSS)

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AnalysisAIv1 – Oct 21, 2026

Out-of-bounds write in the Zephyr RTOS Nuvoton NPCX/NPCK eSPI Target-Attached-Flash driver lets an eSPI host that sends a flash write or RPMC OP1 request with an oversized 12-bit header length field push up to roughly 956 bytes of attacker-influenced data past a fixed 16-word buffer in .bss, and also causes up to 4 KB of adjacent controller SRAM to be programmed into SPI flash at a host-chosen address where the host can read it back. Only builds that explicitly enable CONFIG_ESPI_TAF on NPCX/NPCK silicon are exposed - no in-tree Zephyr board turns the option on by default - and the trigger requires host firmware or bus-level control of the eSPI link rather than ordinary host software, which is consistent with the assessed CVSS 6.3 vector (AV:L/PR:H). No public exploit code was identified at time of analysis, and the vendor has published a patched commit plus a GitHub security advisory.

RemediationAI

Vendor-released patch: upstream commit 1a8a0839c557a4aaa7572eb5d4948abde307b39f, described in advisory GHSA-p882-92qp-g6jr; update Zephyr to a revision containing that commit. The fix widens the loop counter and word count to uint16_t, rejects any request whose rounded word count exceeds both ARRAY_SIZE(FLASHRXBUF) - NPCX_ESPI_FLASH_HEADER_ADDRESS_LEN and NPCX_TAF_RX_PAYLOAD_WORDS (derived from the devicetree rx-plsize), sets a new invalid_flag so espi_taf_work() answers malformed packets with an unsuccessful completion instead of processing them, bounds the transmit payload against FLASHTXBUF (returning -EOVERFLOW), and adds a default case for unsupported cycle types. Where the driver cannot be updated immediately, the effective compensating control is to leave CONFIG_ESPI_TAF disabled - it is off by default on all in-tree boards, so build configurations should be audited before enabling it; the trade-off is loss of host shared-flash arbitration and TAF-based flash access on that target. If TAF is operationally required, restrict the eSPI host side to firmware images that honour the negotiated rx-plsize, since a compliant maximum-length 64-byte write is handled correctly, and treat any eSPI host that can craft non-conforming headers as a trusted-boundary compromise rather than an application-level threat.

Affected VersionsENISA

Zephyr 3.6.0 <4.5.0

Affected Packages

euvd zephyr fix: 4.5.0

Source: OSV (Open Source Vulnerabilities)

Affects your stack

Affects 1 package in euvd

Checking this CVE against your own stacks and servers is part of the Basic plan and up.

Technical ContextAI · show details

The flaw is a classic CWE-787 out-of-bounds write in espi_taf_parse() in drivers/espi/espi_npcx.c. The driver reads a 12-bit length from the TAF request header in the FLASHRXBUF register FIFO and, for write and RPMC OP1 cycle types, copies DIV_ROUND_UP(len, 4) words into struct espi_taf_pckt.src, a fixed 16-word (64-byte) member of a static structure. Neither the length nor the negotiated eSPI receive payload size (rx-plsize, 64 bytes on all in-tree NPCX/NPCK SoCs) was checked, and because both the loop counter and the rounded word count were declared uint8_t, the copy could iterate up to 255 times - about 239 32-bit stores (roughly 956 bytes) past the end of the object straight from the eSPI flash receive interrupt handler. The source side is equally unbounded: reads walk past the 18-word FLASHRXBUF array into neighbouring eSPI registers. The unvalidated length is then handed to flash_write() in espi_taf_npcx_flash_write() with the 64-byte src buffer as the source, so up to 4 KB of adjacent controller SRAM is written into SPI flash at a host-selected address and can be read back by the host. A secondary fixed-size stack buffer in taf_npcx_completion_handler() overflows by four bytes on the maximum-size completion path where tx-plsize is 64. TAF exists precisely so the embedded controller arbitrates host access to shared flash via espi_taf_check_read_protect() and espi_taf_check_write_protect() - corrupting controller memory from a host-supplied field therefore crosses the trust boundary the feature asserts, with consequences ranging from controller crash or hang to corruption of the driver state that gates flash protection regions.

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Severity by source

Vendor (zephyr) PRIMARY 6.3 MEDIUM
AV:L/AC:L/PR:H/UI:N/S:U/C:L/I:H/A:H
vuln.today AI 6.3 MEDIUM

Requires malicious host firmware or eSPI bus control (PR:H) over a local bus (AV:L); a crafted oversized request trivially triggers the overflow (AC:L), corrupting EC memory (I:H/A:H) and leaking adjacent SRAM (C:L).

3.1 AV:L/AC:L/PR:H/UI:N/S:U/C:L/I:H/A:H
4.0 AV:L/AC:L/AT:N/PR:H/UI:N/VC:L/VI:H/VA:H/SC:N/SI:N/SA:N

Primary rating from Vendor (zephyr).

CVSS VectorVendor: zephyr

Attack Vector
Local
Attack Complexity
Low
Privileges Required
High
User Interaction
None
Scope
Unchanged
Confidentiality
Low
Integrity
High
Availability
High

DescriptionCVE.org

The Nuvoton NPCX eSPI driver parses Target-Attached-Flash (TAF) requests in espi_taf_parse() (drivers/espi/espi_npcx.c), taking the 12-bit length field directly out of the request header in the FLASHRXBUF FIFO. For write and RPMC OP1 requests it copied DIV_ROUND_UP(len, 4) words into struct espi_taf_pckt.src, a fixed 16-word (64-byte) member of a static structure, without ever comparing the length against that buffer or against the negotiated eSPI receive payload size (rx-plsize, 64 bytes on all in-tree NPCX/NPCK SoCs). Both the loop counter and the word count were uint8_t, so the copy ran up to 255 iterations.

An eSPI controller that emits a flash request whose header claims a payload larger than the negotiated maximum therefore drives up to 239 32-bit stores past the end of the structure - roughly 956 bytes of out-of-bounds write into .bss - from the eSPI flash receive interrupt handler, while the source reads walk past the end of the 18-word FLASHRXBUF register array into neighbouring eSPI registers. The same unvalidated length was then passed on to flash_write() in espi_taf_npcx_flash_write() with the 64-byte src buffer as source, reading up to 4 KB of adjacent controller SRAM into SPI flash at a host-chosen address, where the host can read it back. A related fixed-size stack buffer in taf_npcx_completion_handler() was overflowed by four bytes on the maximum-size completion path on SoCs whose tx-plsize is 64.

The defect is reachable only from the eSPI host side, and only by a request that violates the negotiated payload size, so it requires host firmware or bus-level control rather than ordinary host software; a compliant maximum-length write fits the buffer exactly and is handled correctly. Because TAF exists specifically so that the embedded controller arbitrates host access to shared flash (espi_taf_check_read_protect() / espi_taf_check_write_protect()), corrupting controller memory from a host-supplied field crosses the trust boundary the feature asserts; consequences range from controller crash or hang to corruption of driver state that gates the flash protection regions.

The fix widens the counters, rejects any request whose word count exceeds both ARRAY_SIZE(FLASHRXBUF) - NPCX_ESPI_FLASH_HEADER_ADDRESS_LEN and NPCX_TAF_RX_PAYLOAD_WORDS (derived from the devicetree rx-plsize), marks such packets with a new invalid_flag so espi_taf_work() answers them with an unsuccessful completion instead of processing them, bounds the transmit payload against FLASHTXBUF, and adds a default case for unsupported cycle types. Only configurations with CONFIG_ESPI_TAF enabled on an NPCX/NPCK target are affected; no in-tree board enables it by default.

Threat Intelligence Overview

EPSS Score
0.1%
Top 99% exploitable
Prevalence
Low
niche EC driver feature, not enabled by default on any in-tree Zephyr board
Data Quality
5 sources
Confidence: Medium

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity MEDIUM
CISA KEV No
Public POC No
EPSS 0.1%
Patch available Yes
Active threat No
Deciding rule
MEDIUM severity (CVSS 4.0-6.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision· derived
Defer
Exploitation· derived
None
System Exposure· derived
Small
Automatable· derived
No
Human Impact· derived
Medium

Priority Score

32
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +32
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

A buffer overflow occurs when a program writes more data to a memory buffer than it was allocated to hold, causing the excess data to spill into adjacent memory regions.

Memory corruption occurs when a program writes data beyond the boundaries of allocated memory regions or accesses memory in unintended ways, violating the integrity of the process's address space.

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