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Linux Kernel EUVDEUVD-2026-64361

| CVE-2026-74674 HIGH
2026-08-22 Linux GHSA-h8c5-5mw2-4jr4
7.8
CVSS 3.1 · Vendor: Linux
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Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Recon
    Gain local unprivileged shell
  2. Delivery
    Trigger munmap to invoke zap_pte_range page table reclaim
  3. Exploit
    Kernel flushes wrong virtual address in paging-structure-cache
  4. Install
    CPU retains stale cache entry for freed page table
  5. C2
    Freed page reallocated to kernel sensitive structure
  6. Execute
    Access kernel data via stale cache reference
  7. Impact
    Read kernel memory or corrupt page mappings for privilege escalation

Vulnerability Assessment

Exploitation Conditions

Exploitation requires a local unprivileged account (PR:L per CVSS) - no network-based exploitation path exists. The vulnerability is triggered during virtual memory unmapping operations (munmap or equivalent) when zap_pte_range encounters a page table eligible for reclaim, a code path reachable by any standard user process making normal memory management syscalls. Reliable exploitation is gated on CPU microarchitecture: AMD systems with EFER.TCE enabled are the primary risk group because INVLPG on AMD is restricted to flushing only the specified target address, making the wrong-address flush completely ineffective and leaving the stale cache entry intact. Intel systems where flush_tlb_one_user selects INVPCID (PCID-capable CPUs with appropriate kernel config) face the same condition. Intel systems using plain INVLPG without INVPCID are partially self-mitigated because INVLPG on non-TCE Intel flushes all paging-structure-caches regardless of address. KPTI (Kernel Page Table Isolation) configuration may further alter the exploitability surface. The kernel commit characterizes the precise control flow required to reach the bad code path as 'very complex,' indicating the race window is narrow and deterministic triggering is non-trivial even under ideal architecture conditions.

Impact

The NVD-assigned CVSS 7.8 High score with AV:L/AC:L/PR:L/UI:N captures the local exploitation requirement and full C/I/A impact potential, but AC:L likely overstates reliability - the kernel commit itself characterizes the triggering conditions as 'very complex' given the convoluted control flow of zap_pte_range, and reliable exploitation is further gated on specific CPU microarchitecture. The EPSS score of 0.20% (10th percentile) reinforces this, indicating negligible observed exploitation activity in the wild. The vulnerability is absent from CISA KEV and no proof-of-concept exploit is known. From an SSVC perspective, exploitation is non-automatable (requires local access, architecture-specific conditions, and timing), but technical impact is high if the race is won. Even a mid-sized municipal IT team in mielec running AMD-based Linux servers should treat kernel upgrades as urgent, given the EFER.TCE factor makes the stale-cache condition fully non-mitigating on that platform - unlike Intel without INVPCID, where the bug accidentally resolves itself. The CVSS C:H/I:H/A:H impact triad is justified: stale paging cache access can expose kernel memory, corrupt page mappings, and destabilize the system. A CVSS 4.0 assessment would likely score this somewhat lower than 7.8 given the attack requirements, but the impact potential is real for unpatched AMD and modern Intel deployments.

Exploit ScenarioDerived

A local attacker with a standard unprivileged account on an AMD Linux server allocates a large virtual memory region and calls munmap, causing zap_pte_range to reclaim page tables while issuing a TLB flush to an incorrect virtual address. The CPU retains a stale paging-structure-cache entry referencing the now-freed page table; speculative memory accesses through this stale entry allow the attacker to read kernel memory or - if the freed physical page is reallocated for a security-sensitive kernel structure - to corrupt kernel data and escalate privileges. No public proof-of-concept exploit exists at time of analysis, though the upstream commit references an apparent real-world symptom in the ripgrep crash report at https://github.com/BurntSushi/ripgrep/issues/3494.

This Week Schedule remediation this week. Why: HIGH severity (CVSS 7.0-8.9).
Patch available 0.2% exploitation probability (EPSS)

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AnalysisAIv1 – Aug 25, 2026

Incorrect TLB flush address targeting in the Linux kernel's zap_pte_range memory management function exposes systems running kernel versions prior to 7.1.9 and 7.2 to local privilege escalation and information disclosure, particularly on AMD systems with EFER.TCE enabled and Intel systems using INVPCID. A low-privileged local attacker can exploit a race where the kernel flushes the wrong virtual address after freeing a page table, leaving stale CPU paging-structure-cache entries that can be speculatively accessed or cause the freed table to be reused with potentially attacker-controlled data. No public exploit code or active exploitation (CISA KEV) has been confirmed at time of analysis, and the 0.20% EPSS score reflects the complexity of reliable exploitation.

RemediationAI

Upgrade to Linux kernel 7.1.9 or 7.2, which contain the upstream fix correcting the addr parameter passed to pte_free_tlb in zap_pte_range. Stable branch commits are available at https://git.kernel.org/stable/c/478a1c3abebfc717db0d1281a9cdd7befafee542 and https://git.kernel.org/stable/c/0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a. For systems where immediate kernel upgrade is not feasible, enforce mandatory access control frameworks such as SELinux in enforcing mode or AppArmor profiles to reduce the blast radius of local exploitation - these do not fix the root cause and carry a trade-off of potential application compatibility friction. Restrict unprivileged local accounts to the minimum necessary and audit for unneeded shell access. AMD-based systems and Intel systems with PCID/INVPCID support should be prioritized for patching, as the accidental mitigation that makes non-INVPCID Intel systems less susceptible does not apply. Monitor distribution security channels (Red Hat RHSA, Debian DSA, Ubuntu USN, SUSE SUSE-SU) for backported kernel packages.

Affected VersionsENISA

Linux patch: 0
Linux 4c640eb4181cf8de74c8b9e7c9cf16bf8d26b73e <478a1c3abebfc717db0d1281a9cdd7befafee542
Linux 4c640eb4181cf8de74c8b9e7c9cf16bf8d26b73e <0b8ff21cbda8808c86b18f1b0ca2d0025af9a80a
Linux 7.0
Linux patch: 7.1.9
Linux patch: 7.2

Affected Packages

euvd linux no fix

Source: OSV (Open Source Vulnerabilities)

Affects your stack

Affects 1 package in euvd

Checking this CVE against your own stacks and servers is part of the Basic plan and up.

Technical ContextAI · show details

This vulnerability resides in the Linux kernel memory management subsystem, specifically in the zap_pte_range function responsible for unmapping virtual memory ranges and reclaiming page tables. When zap_pte_range reclaims a page table via pte_free_tlb(tlb, pmd_pgtable(pmdval), addr), the addr parameter unconditionally points one past the end of the range covered by the table rather than a valid address within it. This causes the TLB paging-structure-cache flush to target the wrong virtual address, potentially leaving stale CPU cache entries referencing the now-freed page table. No CWE has been formally assigned, but the root cause is an off-by-one addressing error in the TLB invalidation path. The severity is architecture-dependent: Intel x86 systems using INVLPG (without INVPCID) accidentally mitigate the bug because INVLPG on non-TCE Intel flushes all paging-structure-caches globally, regardless of target address. However, when flush_tlb_one_user employs INVPCID (available on modern Intel CPUs with PCID support), only the specific virtual address is invalidated, rendering the wrong-address flush completely ineffective. AMD systems with the EFER.TCE (Translation Cache Extension) bit set are similarly and more reliably susceptible, as INVLPG on AMD is architecturally restricted to flush only the target address. The freed page table could subsequently be reallocated for sensitive kernel data, creating a use-after-free condition accessible via speculative execution. CPE: cpe:2.3:a:linux:linux:*:*:*:*:*:*:*:*.

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Severity by source

Vendor (Linux) PRIMARY 7.8 HIGH
AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H
vuln.today AI 7.0 HIGH

AC:H chosen over NVD's AC:L because reliable exploitation requires specific CPU microarchitecture (AMD EFER.TCE or Intel INVPCID) and the triggering kernel control flow is described as 'very complex.'

3.1 AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:H/A:H
4.0 AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N
SUSE 5.5 MEDIUM
AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
Red Hat 7.0 MEDIUM

Primary rating from Vendor (Linux).

CVSS VectorVendor: Linux

Attack Vector
Local
Attack Complexity
Low
Privileges Required
Low
User Interaction
None
Scope
Unchanged
Confidentiality
High
Integrity
High
Availability
High

Lifecycle Timeline

4
CVSS changed
Aug 25, 2026 - 06:22 NVD
7.8 (HIGH)
Patch available
Aug 22, 2026 - 16:01 EUVD
CVE Published
Aug 22, 2026 - 15:32 cve.org
HIGH 7.8
CVE Published
Aug 22, 2026 - 15:32 cve.org
UNKNOWN (no severity yet)

DescriptionCVE.org

In the Linux kernel, the following vulnerability has been resolved:

mm: fix incorrect flush address in direct page table reclaim

When zap_pte_range reclaims a page table, it does:

pte_free_tlb(tlb, pmd_pgtable(pmdval), addr);

and this is unconditionally wrong: if this code executes, addr *always* points one past the end of the range covered by the table. The addr parameter is used to flush the TLB (really the paging-structure-cache) to drop references to the to-be-freed table, and any architecture that cares about the parameter will flush the wrong address. (But they'll still free the correct page).

I think it's worth contemplating why the kernel works at all.

If we hit the offending line of code, we will first clear the PMD entry (line 1954, zap_empty_pte_table), then we will issue pending flushes if force_flush is set (tlb_flush_mmu_tlbonly(tlb)), then we will skip the retry on line 1979 (phew!), and then we will do the offending pte_free_tlb call. *Or* we will clear the PMD entry immediately before pte_free_tlb (line 1983, zap_pte_table_if_empty).

If we have any pending flushes (i.e. we actually zapped any last-level entries) at the time we clear the PMD entry, then the flush really ought to flush all references to the table (Linus certainly seems to think it will on all architectures [0]).

The condition under which we have no accumulated flushes at the time of the clear is very complex (the whole zap_pte_range function has absurdly complex control flow). If we do hit the bad case, then we will end up clearing the PMD entry after the last time the range is flushed, and any CPU is free to cache a reference to the (empty) page table. If this happens due to an ordinary read or write, it would segfault, so it would be rare. But the cache could be speculatively filled as well. Then we'll flush the wrong address and then free and possibly reuse the table.

On x86, even flushing the wrong address works on non-KPTI Intel systems because INVLPG flushes *all* paging-structure-caches, not just the ones for the target address. But INVPCID does not, and flush_tlb_one_user will use INVPCID if it's available. And then we're toast. AMD systems are more susceptible: we set the EFER.TCE bit, which makes even INVLPG only flush the target address.

I think this might fix an issue in ripgrep reported here: https://github.com/BurntSushi/ripgrep/issues/3494

[0] https://lore.kernel.org/all/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com/T/#u

Executive ViewAI

Why It Matters

Linux kernel versions prior to 7.1.9 and 7.2 contain a privilege escalation vulnerability accessible to any user with local system access. Organizations running affected versions risk unauthorized system compromise and data exposure. A vendor patch is available and should be prioritized for immediate deployment.

Business Impact: High
Compensating Controls

Apply vendor patch.

Threat Intelligence Overview

EPSS Score
0.2%
Top 90% exploitable
Prevalence
Ubiquitous
Linux kernel powers most servers, cloud infrastructure, and embedded devices globally
Data Quality
5 sources
Confidence: Medium

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity HIGH
CISA KEV No
Public POC No
EPSS 0.2%
Patch available Yes
Active threat No
Deciding rule
HIGH severity (CVSS 7.0-8.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision· derived
Scheduled
Exploitation· derived
None
System Exposure· derived
Small
Automatable· derived
No
Human Impact
High

Priority Score

39
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +39
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.

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Vendor StatusVendor

SUSE

Severity: Moderate
Product Status
SUSE Linux Enterprise Desktop 15 SP7 Not-Affected
SUSE Linux Enterprise Desktop 15 SP7 Not-Affected
SUSE Linux Enterprise High Availability Extension 15 SP7 Not-Affected
SUSE Linux Enterprise High Availability Extension 15 SP7 Not-Affected
SUSE Linux Enterprise High Availability Extension 16.0 Not-Affected

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