Attack ChainAIDerived
Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain
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AccessLocal access to Altera FPGA EDAC host
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DeliveryTrigger device-add/port-B error path
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ExploitECC IRQ fires in free window
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ExecutionHandler dereferences freed dci
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ImpactKernel memory corruption
Vulnerability Assessment
| Exploitation Conditions | Requires a kernel built with the EDAC/altera driver (CONFIG_EDAC_ALTERA) running on Altera/Intel SoC FPGA hardware. The use-after-free is reachable only in the error path of altr_edac_a10_device_add() or altr_portb_setup(), and only if a managed single- or double-bit ECC IRQ fires in the narrow window after the dci structure is freed but before the managed IRQs are unregistered (AC:H race). Limiting factors: local-only vector (AV:L, not remotely reachable); dependence on this specific, non-default driver and FPGA hardware; and dependence on a probe/setup error actually occurring. The precise mechanism that triggers both the error path and the concurrent IRQ is not described in the available sources. |
| Impact | Signals converge on LOW operational priority despite the 7.4 'High' CVSS. The CVSS vector itself is the dominant limiter: AV:L means no remote reachability, and AC:H reflects a timing race - an ECC IRQ must fire in the narrow window after the dci structure is freed but before the managed IRQ handlers are unregistered. EPSS is 0.21% (10th percentile), consistent with a hardware-specific, hard-to-weaponize memory-safety bug. There is no CISA KEV listing and no public exploit or PoC reference in the input (the git.kernel.org links are fix commits, not exploit code), so this is 'no public exploit identified at time of analysis'. The vuln.today decision label is 'this_week', indicating prompt but non-emergency patching. One conflict to verify: NVD scores PR:N (no privileges), yet the flaw lives in a driver probe/error path and is triggered by ECC interrupt timing on specific FPGA hardware - not an operation an ordinary unprivileged user controls - so the practical privilege/controllability is higher than PR:N implies; verify attacker-reachability with the maintainer. The 'Information Disclosure' tag also understates the C:H/I:H/A:H impact of a kernel use-after-free, which can corrupt memory, not merely leak it. |
| Exploit ScenarioDerived | On an Altera/Intel SoC FPGA system running a kernel with the EDAC/altera driver, the device-add or port-B setup path hits an error and frees the dci structure. Before the managed single/double-bit ECC IRQ handlers are unregistered, an interrupt fires and its handler dereferences altdev(dci->pvt_info), now pointing at freed memory, causing a use-after-free that can corrupt kernel memory or crash the system. No public exploit code exists; exploitation requires the specific hardware and a precisely timed error condition. |
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Alert meAnalysisAIv1 – Oct 24, 2026
Local use-after-free in the Linux kernel EDAC/altera driver (Altera Arria 10 SoC FPGA error-detection support) lets a local user potentially corrupt memory or crash the kernel when the driver's probe or port-B setup path fails. Only systems built with CONFIG_EDAC_ALTERA and running on Altera/Intel SoC FPGA hardware are affected, and the flaw requires the setup error path to be taken while a managed single- or double-bit ECC IRQ fires in the narrow window after the dci structure is freed but before the managed IRQs are unregistered - a hard-to-hit timing condition. CVSS is rated 7.4 High, but EPSS is only 0.21% (10th percentile), there is no CISA KEV listing and no public exploit identified at time of analysis, and vendor fixes are available in Linux 6.18.56, 7.2.10 and 7.3.
RemediationAI
Apply the vendor fix by updating to Linux 6.18.56, 7.2.10 or 7.3, or by backporting the corresponding stable commits (https://git.kernel.org/stable/c/87364b19b3fe4e6dbf88d6acf6db4ec87e7dfbba, https://git.kernel.org/stable/c/eef3b67f9c6782127163b631c9043011a68016e2, https://git.kernel.org/stable/c/865f3bdebbc9b34012358c377c9b15154f95f33b), which reorder teardown so the devres group releases the managed IRQs before dci is freed; patch availability is confirmed per vendor data. Where an immediate kernel update is not possible, the only exposure-reducing control is to stop the driver from binding on affected Altera/Intel SoC FPGA hosts, for example by not building or not loading the altera EDAC module (CONFIG_EDAC_ALTERA) - with the trade-off that ECC single- and double-bit error reporting for that memory controller is lost, reducing the platform's ability to detect and log memory faults. Because the issue is local-only, reachable only through a probe/setup error path on this specific hardware, and carries an EPSS of 0.21% with no known exploitation, remediation can follow the this_week priority label rather than emergency handling.
Affected VersionsENISA
Affected Packages
Source: OSV (Open Source Vulnerabilities)
Affects your stack
Affects 1 package in euvd
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Technical ContextAI · show details
The EDAC (Error Detection And Correction) subsystem reports memory and cache ECC events; the altera driver binds to the Altera Arria 10 SoC FPGA memory controller and registers single-bit and double-bit ECC interrupt handlers. Those handlers are requested as device-managed (devres) IRQs and receive altdev(dci->pvt_info) as their handler data, which is derived from the driver's dci context. In the error paths of altr_edac_a10_device_add() and altr_portb_setup(), the dci structure was released before the devres group was torn down, so a managed IRQ could still be live and dispatch between the free and the unregister, dereferencing freed memory. The fix reverses the teardown order, releasing the devres group (and thereby unregistering the managed IRQs) before dci is freed. No CWE identifier is supplied in the source data, although the description identifies the defect as a use-after-free class issue; the specific mechanism that produces both the setup error and the concurrent IRQ is not described in the available sources. The flaw is introduced in Linux 4.7 (commit 588cb03ea208b303e6dee7e916f329043fd0fc26) and is confined to this non-default FPGA driver rather than to generic kernel memory-management code.
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Severity by source
AV:L/AC:H/PR:N/UI:N/S:U/C:H/I:H/A:H
Local-only driver/error-path bug (AV:L) triggered by a timing race (AC:H); interacting with the EDAC driver realistically needs some privilege (PR:L); kernel UAF yields full C/I/A impact.
Primary rating from Vendor (Linux).
CVSS VectorVendor: Linux
Lifecycle Timeline
4DescriptionCVE.org
In the Linux kernel, the following vulnerability has been resolved:
EDAC/altera: Fix use-after-free in error paths
In both altr_edac_a10_device_add() and altr_portb_setup(), the error path freed the dci structure before releasing the devres group. Since the managed single and double bit IRQ handlers use altdev(dci->pvt_info) as their data, an IRQ firing between freeing dci and unregistering the IRQs could dereference the freed memory.
Release the devres group first so the managed IRQs are unregistered before the dci structure is freed.
Executive ViewAI
CVE-2026-98932 is a high-severity local use-after-free in the Linux kernel EDAC/altera driver, affecting only systems with Altera Arria 10 SoC FPGA hardware and the CONFIG_EDAC_ALTERA option enabled. Exploitation requires a local user and a rare timing condition during driver setup failure, making real-world impact low; no public exploit exists and EPSS is 0.2%, so leadership should prioritize patching only for affected FPGA-based infrastructure.
Apply vendor patch.
Threat Intelligence Overview
How this decision was reached
The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.
What every action level means
SSVC AssessmentENISA
Priority Score
Attack Technique
Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.
EUVD-2026-108904
GHSA-5pw6-gvgr-qwqf
NVD
CVE.org
EPSS
Exploit-DB