Skip to main content

Microchip Crypto Libraries CVE-2026-89172

| EUVDEUVD-2026-76846 MEDIUM
Improper Protection of Physical Side Channels (CWE-1300)
2026-09-12 Microchip GHSA-pxq3-m9x7-5w4m
5.6
CVSS 4.0 · Vendor: Microchip
View

Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Access
    Gain physical device access
  2. Delivery
    Attach power or EM measurement probe
  3. Exploit
    Trigger repeated cryptographic operations
  4. Execution
    Capture side-channel traces
  5. Persist
    Apply DPA/SPA correlation analysis
  6. Impact
    Recover full cryptographic key material

Vulnerability Assessment

Weakness
CWE
ASVS 5.0
V15 - Secure Coding and Architecture Hardware access control bypass
Exploitation Conditions

Physical proximity to the target hardware is a hard prerequisite - the attacker must be able to instrument the device's power supply or capture its electromagnetic emissions, requiring either direct probe attachment or close EM proximity (typically within centimeters). The vulnerability is specific to firmware derived from Microchip AN1044, AN953, or SW300052; devices using independently implemented or third-party cryptographic libraries are not affected. The CVSS 4.0 AT:P (Attack Target Partial) metric signals that not all devices built on these application notes may be equally vulnerable - device-specific PCB layout, decoupling capacitor placement, or silicon process variation can influence exploitability. Exploitation is further limited to the window during which cryptographic operations are actively executing; powered-off or idle devices cannot be attacked. The attack does not provide integrity or availability impact - only key extraction (confidentiality). Repeated access for trace collection (typically hundreds to thousands of traces) is required, which limits opportunistic or one-shot exploitation.

Impact

The CVSS 4.0 base score of 5.6 with AV:P/AC:H/AT:P accurately reflects a genuinely constrained threat model: the attacker must have physical access to the device, specialized laboratory or field measurement equipment (oscilloscope, EM probe, signal acquisition hardware), and advanced expertise in side-channel signal processing - this is not a remotely exploitable or automated attack. Despite VC:H and SC:H indicating full cryptographic key recovery is achievable, the exploitation barrier is realistic only for well-resourced adversaries such as nation-state actors, sophisticated criminal groups, or well-funded hardware security researchers. There is no CISA KEV listing and no EPSS data was provided; the absence of active exploitation signals is consistent with the high physical-access requirement. The highest real-world risk applies to embedded deployments where long-lived devices store high-value keys - secure payment hardware, industrial control nodes, smart meters, or secure element alternatives - rather than general-purpose computing environments. The AT:P condition further limits which specific device variants are exploitable, and defenders should prioritize hardening efforts on devices handling the most sensitive cryptographic material.

Exploit ScenarioDerived

An attacker with physical access to a deployed embedded device - such as a smart meter or industrial controller - attaches a current probe to the device's power supply rail and triggers repeated AES encryption operations by replaying valid protocol messages. After collecting thousands of power traces using a digital oscilloscope and applying Differential Power Analysis using publicly available toolkits such as ChipWhisperer, the attacker statistically recovers all 128 or 256 bits of the device's symmetric key. No public POC targeting these specific Microchip implementations is identified, but DPA against unprotected AES is a well-characterized technique with freely available open-source tooling.

This Month Plan within 30 days. Why: MEDIUM severity (CVSS 4.0-6.9).
No patch listed yet 0.2% exploitation probability (EPSS)

Get an e-mail when this CVE is exploited, patched or re-scored. Free account.

Alert me

AnalysisAIv1 – Sep 12, 2026

Side-channel leakage in Microchip's AN1044, AN953, and SW300052 cryptographic reference implementations allows a physically proximate attacker with specialized measurement equipment to extract secret cryptographic keys through power, electromagnetic, or timing analysis. Affected through revision A (AN1044, AN953) and version 2.6 (SW300052), these application notes and associated library are commonly used by embedded developers implementing cryptography on Microchip microcontrollers, meaning extracted keys could compromise the security of devices and downstream systems they protect. No public exploit code is identified at time of analysis, but the attack methodology - Differential Power Analysis (DPA), Simple Power Analysis (SPA) - is well-documented in hardware security literature and reproducible by skilled researchers with commodity equipment.

RemediationAI

Consult Microchip's advisory at https://www.microchip.com/en-us/solutions/technologies/embedded-security/how-to-report-potential-product-security-vulnerabilities/side-channel-attack-an1044-an953-sw300052-cryptographic-algorithms for current guidance on updated revisions. Since AN1044 and AN953 are reference design documents rather than binary releases, developers should check whether Microchip has published hardened successor revisions incorporating side-channel countermeasures such as algorithmic masking, shuffling, or blinding; for SW300052, an updated release beyond version 2.6 should be sought from Microchip's development tool portal. No vendor-released patch version is independently confirmed from available data. Where immediate upgrade is not possible, compensating controls include: restricting physical access to devices through tamper-evident enclosures or potting compound (reduces probe attachment risk, at the cost of repairability); disabling or fusing test and debug ports (JTAG, SWD) to prevent probe point access; and engaging a hardware security specialist to apply masking countermeasures directly to derived firmware before production. These controls reduce but do not eliminate side-channel risk.

Affected VersionsENISA

AN1044 0 ≤A
AN953 0 ≤A
SW300052 0 ≤2.6

Affected Packages

euvd sw300052 no fix

Source: OSV (Open Source Vulnerabilities)

Affects your stack

Affects 1 package in euvd

Checking this CVE against your own stacks and servers is part of the Basic plan and up.

Technical ContextAI · show details

CWE-1300 (Improper Protection of Physical Side Channels) describes cryptographic implementations where secret data - typically private or symmetric keys - can be inferred by measuring physical properties of the hardware during computation, such as instantaneous power consumption, electromagnetic radiation, or processing time variance. The affected products are Microchip application notes AN1044 and AN953, which describe cryptographic algorithm implementations intended for use on Microchip PIC, SAM, and AVR-class microcontrollers, and SW300052, the accompanying software library (CPE: cpe:2.3:a:microchip:sw300052, versions through 2.6). When cryptographic operations such as AES, ECC, or RSA are not protected by countermeasures - for example, algorithmic masking, key-dependent shuffling, or constant-time execution - an attacker with probe access can perform correlation-based attacks by collecting many power or EM traces across repeated operations and statistically linking trace features to internal key byte guesses. The CVSS 4.0 AT:P metric confirms that specific attack-target conditions (particular device silicon, firmware variant, or operational mode) must align for successful exploitation.

Know when An1044 gets its next vulnerability

  • Watch products and get an email when something new is published
  • Check this CVE against your own stack and servers
  • Exploit and PoC references, threat intelligence from 22 sources

No credit card · 7-day full trial

Severity by source

Vendor (Microchip) PRIMARY 5.6 MEDIUM
CVSS:4.0/AV:P/AC:H/AT:P/PR:N/UI:N/VC:H/VI:N/VA:N/SC:H/SI:N/SA:N
vuln.today AI 4.9 MEDIUM

Physical access and specialized measurement equipment required; scope changed because extracted keys compromise downstream protected systems, not just the vulnerable device itself.

3.1 AV:P/AC:H/PR:N/UI:N/S:C/C:H/I:N/A:N
4.0 AV:P/AC:H/AT:P/PR:N/UI:N/VC:H/VI:N/VA:N/SC:H/SI:N/SA:N

Primary rating from Vendor (Microchip).

CVSS VectorVendor: Microchip

Attack Vector
Physical
Attack Complexity
High
Attack Requirements
Present
Privileges Required
None
User Interaction
None
Vulnerable system: Confidentiality
High
Vulnerable system: Integrity
None
Vulnerable system: Availability
None
Subsequent system: Confidentiality
High
Subsequent system: Integrity
None
Subsequent system: Availability
None

DescriptionCVE.org

Improper protection of physical side channels vulnerability in Microchip AN1044, Microchip AN953, and Microchip SW300052.

This issue affects AN1044: through A; AN953: through A; SW300052: through 2.6.

Threat Intelligence Overview

EPSS Score
0.2%
Top 90% exploitable
Prevalence
Low
niche cryptographic reference library for Microchip embedded MCU developers
Data Quality
5 sources
Confidence: Medium

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity MEDIUM
CISA KEV No
Public POC No
EPSS 0.2%
Patch available No
Active threat No
Deciding rule
MEDIUM severity (CVSS 4.0-6.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision· derived
Defer
Exploitation
None
System Exposure· derived
Small
Automatable
No
Human Impact· derived
Medium
Technical Impact
Partial

Priority Score

28
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +28
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.

This site uses cookies essential for authentication and security. No tracking or analytics cookies are used. Privacy Policy