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TCG TPM 2.0 CVE-2026-6726

| EUVDEUVD-2026-56224 HIGH
Incorrect Type Conversion or Cast (CWE-704)
2026-08-11 certcc GHSA-72rq-994p-w2hw
7.9
CVSS 3.1 · Vendor: certcc
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Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Access
    Gain high-privilege local system access
  2. Delivery
    Craft falsified TPM Attestation Key blob
  3. Exploit
    Submit key via TPM attestation interface exploiting type confusion
  4. Execution
    Receive CA-issued credential for forged TPM key
  5. Persist
    Generate fraudulent TPM attestation reports
  6. Impact
    Bypass attestation-based security controls on relying systems

Vulnerability Assessment

Weakness
CWE
ASVS 5.0
V15 - Secure Coding and Architecture Correct type conversion
Exploitation Conditions

Exploitation requires local access to the target system with high privileges - administrator or root equivalent - on a platform running a TPM 2.0 implementation derived from the vulnerable TCG reference code at version v184 or earlier (per CVSS AV:L and PR:H). The attacker must be able to interact with the TPM's key attestation interface to submit the falsified key blob and must have access, directly or through the compromised system, to a TPM-aware Certificate Authority that processes attestation requests. Exploitation is strictly bounded to post-compromise scenarios: an unauthenticated remote attacker cannot exploit this vulnerability without first achieving high-privilege local access. The integrity impact is further limited to environments where TPM attestation certificates are actively used for automated trust decisions - organizations that do not rely on Attestation Key, DevID Key, or TLS authentication key workflows backed by a TPM-aware CA are not materially exposed to the scope-changing consequences described.

Impact

The CVSS 7.9 score with a scope-changing vector (AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N) captures two competing realities: the attack prerequisites are substantial, yet successful exploitation carries serious cross-system integrity consequences. The EPSS score of 0.22% at the 13th percentile strongly suggests opportunistic or automated exploitation is unlikely; this is consistent with a post-compromise technique requiring an attacker who has already achieved elevated local access. There is no CISA KEV listing and no public POC reported, meaning the threat is plausibly limited to sophisticated, targeted actors with a specific interest in defeating TPM-based trust chains. The gap between the moderately high CVSS score and the low EPSS is not a contradiction - it reflects that the attack path requires an already-privileged local foothold, making this an escalation-of-trust issue rather than an initial access vector. The actual risk is highly concentrated in environments where TPM attestation underpins automated security decisions: zero-trust device posture enforcement, measured boot integrity checks, and DevID-based 802.1X or VPN admission. In those environments, even a mid-sized municipal IT team in zabrze that relies on TPM-backed device certificates for network access control should evaluate whether their TPM chip vendor has consumed the TCG VRT0010 errata, because successful exploitation is invisible to attestation relying parties. Organizations with no TPM attestation workflows face negligible residual risk from this vulnerability.

Exploit ScenarioDerived

An attacker who has already obtained administrator or root-level access to a machine with a vulnerable TPM 2.0 implementation crafts a falsified Attestation Key and submits it through the TPM key attestation interface, exploiting the type-handling flaw to make the key appear TPM-resident to a TPM-aware CA. The CA, unable to distinguish the falsified key from a genuine hardware-bound key, issues a legitimate attestation credential, which the attacker then uses to generate fabricated attestation reports - bypassing zero-trust device posture checks or DevID-based network admission controls on other machines or networks. No public POC has been reported, indicating this is a sophisticated post-compromise technique rather than a commodity exploit.

This Week Schedule remediation this week. Why: HIGH severity (CVSS 7.0-8.9).
No patch listed yet 0.2% exploitation probability (EPSS)

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AnalysisAIv1 – Aug 12, 2026

Credential forgery via type confusion in the TCG TPM 2.0 reference code (versions through v184) allows a local attacker holding high-privilege access to submit a falsified TPM key - such as an Attestation Key, DevID Key, or TLS authentication key - to a TPM-aware Certificate Authority and receive a legitimate credential for it. With that credential, the attacker can forge subsequent TPM 2.0 attestations, silently undermining the platform integrity guarantees that downstream security controls depend on, including measured boot verification, zero-trust device posture checks, and DevID-based network admission. No public exploit code has been identified at time of analysis, and this vulnerability is not listed in the CISA KEV catalog; the EPSS score of 0.22% at the 13th percentile is consistent with a targeted, post-compromise technique rather than a commodity attack.

RemediationAI

Apply the TCG errata for the TPM Library Specification 2.0 available at https://trustedcomputinggroup.org/resource/errata-for-tpm-library-specification-2-0/ and review the full VRT0010 advisory at https://trustedcomputinggroup.org/wp-content/uploads/VRT0010-Advisory_Final-1.pdf; extended implementation-level guidance for downstream vendors is published at https://trustedcomputinggroup.org/wp-content/uploads/Extended-vrt0010-11-guidance_V1.pdf. No specific patched release version number is stated in the available data - the affected range is confirmed as all versions up to and including v184, implying a corrected version exists post-v184, but the exact fixed version number must be verified directly with TCG and your TPM chip vendor before concluding that a given firmware build is safe. Organizations should contact their TPM hardware vendor to confirm whether their specific firmware revision incorporates the VRT0010 fix, as the reference code fix does not automatically propagate to shipping firmware. As a compensating control while awaiting vendor confirmation, restrict local privileged access to systems where TPM attestation underpins critical trust decisions, audit CA issuance logs for anomalous TPM credential requests, and consider requiring additional out-of-band verification for TPM-attested device identities in high-sensitivity environments.

Affected VersionsENISA

TPM2.0 0 ≤v184

Affects your stack

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Technical ContextAI · show details

The Trusted Computing Group (TCG) TPM 2.0 reference implementation (CPE: cpe:2.3:a:trusted_computing_group:tpm2.0:*:*:*:*:*:*:*:*) is the canonical reference code from which hardware vendors derive TPM firmware; it covers all versions up to and including v184 per EUVD-2026-56224. The root cause is CWE-704 (Incorrect Type Conversion or Cast): a type-handling defect allows a privileged local process to supply a crafted key blob that the reference code processes as a legitimate hardware-generated key without enforcing the type boundaries required to distinguish software-generated keys from TPM-resident ones. TPM Attestation Keys and DevID Keys are architecturally designed to cryptographically prove that a key was created inside and never left the TPM hardware boundary; a type-confusion flaw that permits an externally crafted key to impersonate a TPM-bound key directly breaks the root-of-trust assumption. The CVSS scope change (S:C) reflects that exploitation targets the TPM itself, yet the consequential harm materializes in external systems - particularly TPM-aware CAs and relying parties that accept TPM attestation certificates as proof of platform identity. TCG formally tracks this as VRT0010.

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Severity by source

Vendor (certcc) PRIMARY 7.9 HIGH
AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N
vuln.today AI 7.9 HIGH

High privileges required to interact with TPM attestation interface; scope change reflects trust-chain impact on external CAs; no availability impact observed.

3.1 AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N
4.0 AV:L/AC:L/AT:N/PR:H/UI:N/VC:H/VI:H/VA:N/SC:H/SI:H/SA:N

Primary rating from Vendor (certcc).

CVSS VectorVendor: certcc

Attack Vector
Local
Attack Complexity
Low
Privileges Required
High
User Interaction
None
Scope
Changed
Confidentiality
High
Integrity
High
Availability
None

Lifecycle Timeline

3
CVSS changed
Aug 12, 2026 - 20:22 NVD
7.9 (HIGH)
CVE Published
Aug 11, 2026 - 15:24 cve.org
HIGH 7.9
CVE Published
Aug 11, 2026 - 15:24 cve.org
UNKNOWN (no severity yet)

DescriptionCVE.org

An information leakage vulnerability was reported in the TCG TPM 2.0 reference code that could allow a local attacker with elevated privileges to obtain a credential from a TPM-aware CA for a falsified TPM key (such as an Attestation Key, DevID Key or TLS authentication key) and falsify other TPM 2.0 attestations with this key. See also TCG VRT0010.

Executive ViewAI

Why It Matters

A credential forgery vulnerability in TCG TPM 2.0 reference code (v184 and earlier) enables high-privilege local attackers to forge device attestations, undermining zero-trust device posture verification and measured boot integrity checks that many organizations depend on for compliance and security architecture. With a 0.2% exploitation likelihood and high-privilege requirement, this represents a targeted, post-compromise risk rather than widespread threat, but affects the foundational trust model for organizations using TPM-based device authentication.

Business Impact: High
Compensating Controls

No vendor-released patch identified at time of analysis. Implement: enforce least-privilege access to local administrator roles; deploy real-time monitoring and alerting for TPM key operations, credential registration requests, and attestation issuances; segregate TPM-reliant systems with enhanced access logging and audit trails; evaluate and deploy supplementary device trust mechanisms (hardware-backed attestation, FIPS-validated alternatives) to eliminate TPM-only dependency; disable non-essential TPM features and services; consider hardware TPM variants with enhanced tamper detection and resistance.

Threat Intelligence Overview

EPSS Score
0.2%
Top 87% exploitable
Prevalence
High
TPM 2.0 reference code underlies virtually all modern PC and server TPM chips
Vendor Status
Publicly Disclosed:No
Exploited:No
Latest Software Release:Exploitation Less Likely
Data Quality
6 sources
Confidence: High

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity HIGH
CISA KEV No
Public POC No
EPSS 0.2%
Patch available No
Active threat No
Deciding rule
HIGH severity (CVSS 7.0-8.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision
Scheduled
Exploitation
None
System Exposure· derived
Small
Automatable
No
Human Impact
High
Technical Impact
Total

Priority Score

40
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +40
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.

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