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Linux Kernel CVE-2026-45944

| EUVDEUVD-2026-32228 HIGH
Race Condition (CWE-362)
2026-05-27 416baaa9-dc9f-4396-8d5f-8c081fb06d67 GHSA-xp3w-6f4f-gvg7
7.5
CVSS 3.1 · Vendor: 416baaa9-dc9f-4396-8d5f-8c081fb06d67
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Attack ChainAIDerived

Hypothetical attack flow derived from CVE metadata – not a confirmed exploit chain

  1. Access
    Obtain local high-privileged access on VT-d host
  2. Delivery
    Identify VFIO-assignable PCI device
  3. Exploit
    Trigger repeated IOMMU context teardown
  4. Execution
    Race torn 128-bit context entry fetch
  5. Persist
    Induce spurious DMA fault or isolation breakdown
  6. Impact
    Leverage for kernel instability or memory access

Vulnerability Assessment

Weakness
CWE
OWASP Top 10:2025
A06:2025 - Insecure Design
ASVS 5.0
V15 - Secure Coding and Architecture Concurrency control, locking
MITRE ATT&CK

1 technique across 1 tactic: Privilege Escalation

The technique list with ATT&CK links and the kill-chain view is part of the Basic plan and up.

Exploitation Conditions

Exploitation requires local code execution on an x86 system with an Intel CPU whose VT-d IOMMU is enabled (intel_iommu=on, the default on most modern server and many desktop distributions), and the attacker must already hold High privileges sufficient to drive IOMMU context teardown - in practice root with CAP_SYS_ADMIN or equivalent control over VFIO/PCI device assignment or domain attach/detach paths. The CVSS vector's AC:H reflects that the attacker must also win a tight timing race between the kernel's multi-write teardown of a 128-bit context entry and an IOMMU hardware fetch, which requires concurrent DMA activity on the affected device. Exploitation is limited by: the need for prior High privileges (PR:H), high attack complexity (AC:H) due to the race window, the requirement that VT-d be enabled and a relevant device be assignable, no remote attack surface (AV:L), and the fact that systems without Intel VT-d hardware or with the IOMMU disabled are not affected.

Impact

The CVSS 3.1 vector (AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:H) yields 7.5 (High) but reflects a difficult exploitation profile: local access, high attack complexity, and high privileges are all required, with the high score driven primarily by the changed scope and high impact triad. EPSS corroborates the low practical risk at 0.02% (4th percentile), and the CVE is not listed on CISA KEV, with no public exploit identified at time of analysis. Real-world risk is therefore low - this is a kernel hardening fix for a hardware race condition that requires an already-privileged local actor (or an unusual concurrent kernel workload) to even reach the narrow window. The 'Information Disclosure' tag conflicts somewhat with a vector showing full C/I/A impact and scope change; the underlying defect is more accurately a stability/integrity issue in IOMMU teardown that could conceivably cause DMA isolation breakdown, so the tag should be treated as advisory rather than authoritative.

Exploit ScenarioDerived

A local attacker who already holds high privileges (typically root/CAP_SYS_ADMIN, or an attacker who has compromised a virtualization control plane) triggers repeated IOMMU context teardown operations - for example by rapidly attaching and detaching a VFIO-bound PCI device or tearing down guest domains - while concurrent DMA traffic causes the hardware to fetch context entries. Winning the narrow race produces a torn context entry where the Present bit remains set over partially-zeroed fields, potentially leading to spurious DMA faults, kernel instability, or in adversarial scenarios a breakdown of DMA isolation that could be parlayed into memory disclosure or corruption. No public exploit identified at time of analysis, and the High attack complexity in the CVSS vector reflects that reliably hitting the race is non-trivial.

This Week Schedule remediation this week. Why: HIGH severity (CVSS 7.0-8.9).
Patch available 0.0% exploitation probability (EPSS)

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AnalysisAIv1 – May 30, 2026

Race condition in the Intel VT-d IOMMU driver of the Linux kernel allows a window where hardware can fetch a 'torn' context entry while the Present bit is still set, leading to unpredictable IOMMU behavior or spurious DMA faults on affected systems. The flaw stems from non-atomic teardown of 128-bit context entries via multiple 64-bit writes and is addressed by aligning with the VT-d specification's ownership handshake (Section 6.5.3.3); no public exploit identified at time of analysis, and EPSS rates exploitation probability at just 0.02%.

RemediationAI

Upstream fix available via the stable kernel commits a922dbafb4a674d958d702038232d09a30daf770, c1e4f1dccbe9d7656d1c6872ebeadb5992d0aaa2, and d2138abc8f0a7fce4101b7229b43b06811ed083d; vendor-released patched kernels are Linux 6.18.14, 6.19.4, and 7.0, so administrators should upgrade to one of these (or the distribution-backported equivalent) at the next maintenance window. Given the High attack complexity and High privileges required, emergency patching is generally not warranted; prioritize systems where untrusted code runs with kernel-adjacent privileges or where IOMMU-protected device assignment (VFIO/PCI passthrough to guests) is in use. As a compensating control where patching must be deferred, consider disabling Intel VT-d at boot (intel_iommu=off) on hosts that do not require DMA remapping - this eliminates the affected codepath but removes DMA isolation protections and breaks PCI passthrough and DMA-attack hardening, so it is unsuitable for virtualization hosts or systems exposed to malicious peripherals. Tightening privileged-user access (so PR:H prerequisites cannot easily be met) is a low-cost partial mitigation. Vendor advisory references: the three git.kernel.org commit URLs above and https://nvd.nist.gov/vuln/detail/CVE-2026-45944.

Affected VersionsENISA

Linux patch: 6.19.4
Linux patch: 7.0
Linux ba39592764ed20cee09aae5352e603a27bf56b0d <d2138abc8f0a7fce4101b7229b43b06811ed083d
Linux patch: 0
Linux 2.6.24
Linux ba39592764ed20cee09aae5352e603a27bf56b0d <c1e4f1dccbe9d7656d1c6872ebeadb5992d0aaa2
Linux patch: 6.18.14
Linux ba39592764ed20cee09aae5352e603a27bf56b0d <a922dbafb4a674d958d702038232d09a30daf770

Affected Packages

euvd linux no fix

Source: OSV (Open Source Vulnerabilities)

Affects your stack

Affects 1 package in euvd

Checking this CVE against your own stacks and servers is part of the Basic plan and up.

Technical ContextAI · show details

The vulnerability resides in the Intel Virtualization Technology for Directed I/O (VT-d) driver (drivers/iommu/intel/) which manages DMA remapping for Intel IOMMU hardware. Context entries are 128-bit data structures used by the IOMMU to translate DMA requests from PCI devices; the Present (P) bit signals to hardware that the entry is valid for translation. The bug arises because teardown zeroed the entire entry using two 64-bit writes without first clearing the Present bit, creating a torn-read window where the IOMMU could fetch a half-zeroed but still-Present entry. Although x86 provides strong memory ordering for stores from a single CPU, the compiler can reorder the two halves and the hardware's fetch is not atomic relative to multiple CPU writes, violating the VT-d specification's prescribed ownership handshake between software and hardware. No CWE was assigned, but the root cause class is a concurrent/non-atomic update of shared hardware-visible state (akin to CWE-362 race condition).

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Severity by source

Vendor (416baaa9-dc9f-4396-8d5f-8c081fb06d67) PRIMARY 7.5 HIGH
AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:H
SUSE HIGH
Red Hat 5.5 MEDIUM

Primary rating from Vendor (416baaa9-dc9f-4396-8d5f-8c081fb06d67).

CVSS VectorVendor: 416baaa9-dc9f-4396-8d5f-8c081fb06d67

Attack Vector
Local
Attack Complexity
High
Privileges Required
High
User Interaction
None
Scope
Changed
Confidentiality
High
Integrity
High
Availability
High

Lifecycle Timeline

3
CVSS changed
May 30, 2026 - 11:22 NVD
7.5 (HIGH)
CVE Published
May 27, 2026 - 14:17 nvd
UNKNOWN (no severity yet)
CVE Published
May 27, 2026 - 14:17 nvd
HIGH 7.5

DescriptionCVE.org

In the Linux kernel, the following vulnerability has been resolved:

iommu/vt-d: Clear Present bit before tearing down context entry

When tearing down a context entry, the current implementation zeros the entire 128-bit entry using multiple 64-bit writes. This creates a window where the hardware can fetch a "torn" entry - where some fields are already zeroed while the 'Present' bit is still set - leading to unpredictable behavior or spurious faults.

While x86 provides strong write ordering, the compiler may reorder writes to the two 64-bit halves of the context entry. Even without compiler reordering, the hardware fetch is not guaranteed to be atomic with respect to multiple CPU writes.

Align with the "Guidance to Software for Invalidations" in the VT-d spec (Section 6.5.3.3) by implementing the recommended ownership handshake:

  1. Clear only the 'Present' (P) bit of the context entry first to

signal the transition of ownership from hardware to software.

  1. Use dma_wmb() to ensure the cleared bit is visible to the IOMMU.
  2. Perform the required cache and context-cache invalidation to ensure

hardware no longer has cached references to the entry.

  1. Fully zero out the entry only after the invalidation is complete.

Also, add a dma_wmb() to context_set_present() to ensure the entry is fully initialized before the 'Present' bit becomes visible.

Executive ViewAI

Why It Matters

A Linux kernel vulnerability affecting Intel VT-d IOMMU drivers could cause system instability and DMA faults in virtualized server environments and cloud infrastructure. While exploitation remains highly unlikely (0.0% EPSS) and no active attacks have been identified, organizations operating Intel-based virtualization platforms should prepare mitigation strategies and plan for patching once vendor updates become available.

Business Impact: Low
Compensating Controls

No vendor-released patch identified at time of analysis. Interim mitigations: disable VT-d IOMMU in system BIOS if not operationally required (acknowledge performance impact on virtualization workloads); implement enhanced kernel log monitoring for IOMMU-related errors and system faults; maintain patch readiness and apply immediately when distribution vendors release kernel updates.

Threat Intelligence Overview

EPSS Score
0.0%
Top 96% exploitable
Data Quality
6 sources
Confidence: High

How this decision was reached

The engine reads each signal below and applies a fixed list of rules from top to bottom. The first rule that matches sets the recommended action – like a statement, every line is shown.

SignalValue
Severity HIGH
CISA KEV No
Public POC No
EPSS 0.0%
Patch available Yes
Active threat No
Deciding rule
HIGH severity (CVSS 7.0-8.9)
What every action level means
Emergency Immediate action required. Criteria: CRITICAL + in CISA KEV (actively exploited) without patch, OR CRITICAL + EPSS > 30% without patch, OR CRITICAL + active threat signals without patch.
Act Now Prioritize within 24-48h. Criteria: in KEV with patch available, OR CRITICAL + public POC, OR HIGH + EPSS > 10%, OR CRITICAL + active threat, OR any CRITICAL severity.
This Week Schedule remediation this week. Criteria: HIGH severity (CVSS 7.0-8.9). Patch within normal change window.
This Month Plan within 30 days. Criteria: MEDIUM severity (CVSS 4.0-6.9), lower exploitation probability. Include in regular patch cycle.
Monitor Track and reassess. Criteria: LOW severity (CVSS 0.1-3.9), minimal exploitation risk. No immediate action needed.

SSVC AssessmentENISA

SSVC Decision· derived
Defer
Exploitation· derived
None
System Exposure· derived
Small
Automatable· derived
No
Human Impact
Low

Priority Score

38
Low Medium High Critical
KEV: 0
EPSS: 0
CVSS: +38
PoC: 0
Weaponized: 0
Threat intel: 0
Gov advisory: 0

Attack Technique

Information disclosure occurs when an application unintentionally exposes sensitive data that aids attackers in reconnaissance or directly compromises security.

Race conditions occur when multiple concurrent requests exploit the brief time gap between checking a condition and acting upon it (TOCTOU - Time of Check, Time of Use).

Vendor StatusVendor

SUSE

Severity: High
Product Status
SUSE Linux Enterprise Desktop 15 SP7 Fixed
SUSE Linux Enterprise Desktop 15 SP7 Fixed
SUSE Linux Enterprise High Availability Extension 15 SP7 Fixed
SUSE Linux Enterprise High Availability Extension 15 SP7 Fixed
SUSE Linux Enterprise High Performance Computing 15 SP7 Fixed

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