What is the CVSS score of CVE-2026-29647?

CVE-2026-29647 has a CVSS 3.1 base score of 6.5 (Medium). CVSS vector: CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N. EPSS exploitation probability: 0.0%.

OpenXiangShan NEMU CVE-2026-29647

EUVD-2026-23960 MEDIUM

Improper Privilege Management (CWE-269)

2026-04-20 mitre

GHSA-8w4w-q822-g7ph

Privilege Escalation N A

6.5

CVSS 3.1 · NVD

Severity by source

NVD PRIMARY

6.5 MEDIUM

AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N

Primary rating from NVD · only source for this CVE.

CVSS VectorNVD

CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N

Attack Vector

Network

Attack Complexity

Low

Privileges Required

Low

User Interaction

None

Scope

Unchanged

Confidentiality

High

Integrity

None

Availability

None

Lifecycle Timeline

Analysis Generated

Apr 21, 2026 - 20:25 vuln.today

CVSS changed

Apr 21, 2026 - 20:22 NVD

6.5 (MEDIUM)

EUVD ID Assigned

Apr 20, 2026 - 21:15 euvd

EUVD-2026-23960

Analysis Generated

Apr 20, 2026 - 21:15 vuln.today

CVE Published

Apr 20, 2026 - 00:00 nvd

MEDIUM 6.5

DescriptionCVE.org

In OpenXiangShan NEMU, insufficient Smstateen permission enforcement allows lower-privileged code to access IMSIC state via stopei/vstopei CSRs even when mstateen0.IMSIC is cleared, potentially enabling cross-context information leakage or disruption of interrupt handling.

AnalysisAI

OpenXiangShan NEMU fails to properly enforce Smstateen permission controls, allowing authenticated local users to access IMSIC (Incoming Message Signal Interrupt Controller) state through stopei/vstopei CSRs despite mstateen0.IMSIC being cleared. This privilege escalation enables cross-context information disclosure of interrupt state and potential disruption of interrupt handling mechanisms in lower-privileged execution contexts.

Technical ContextAI

OpenXiangShan NEMU is a RISC-V emulator/simulator. The vulnerability involves insufficient enforcement of the Smstateen extension, a RISC-V privilege specification mechanism that controls access to privileged state via mstateen0 registers. Specifically, the stopei (Stop External Interrupt) and vstopei (Virtual Stop External Interrupt) Control and Status Registers (CSRs) should be gated by the mstateen0.IMSIC permission bit. When mstateen0.IMSIC is cleared (disabled), lower-privileged code (S-mode/U-mode) should be blocked from accessing IMSIC state, but the insufficient permission enforcement allows bypass. The root cause is improper access control validation (CWE-269: Improper Access Control) in the CSR access path. This is a simulator/emulator vulnerability affecting RISC-V architecture emulation correctness and security property enforcement.

RemediationAI

Apply the upstream fix from OpenXiangShan/NEMU pull request #3978, which corrects Smstateen permission enforcement in the CSR access control path for stopei/vstopei registers. Users should merge or cherry-pick the PR changes into their NEMU builds and recompile. If immediate patching is not feasible, apply input validation at the simulator-guest boundary: explicitly block guest code in S-mode and U-mode from executing stopei/vstopei CSR instructions when mstateen0.IMSIC is cleared, implementing the permission check in the CSR instruction decoder. No runtime workaround is available for systems already using vulnerable NEMU builds; recompilation with the fix is required. For organizations using NEMU in architecture validation pipelines, update regression tests to verify mstateen0.IMSIC permission enforcement against the RISC-V Smstateen specification (docs.riscv.org reference provided).