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Linux Kernel EUVDEUVD-2026-55431

| CVE-2026-68330 HIGH
2026-08-10 Linux GHSA-r4m4-4ffx-qg5j
7.8
CVSS 3.1 · Vendor: Linux
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Severity by source

Vendor (Linux) PRIMARY
7.8 HIGH
AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H
vuln.today AI
7.0 HIGH

Timing-sensitive cache window and mandatory EN7581 non-coherent DMA hardware make conditions substantially harder than AC:L implies.

3.1 AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:H/A:H
4.0 AV:L/AC:H/AT:P/PR:L/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N
SUSE
5.5 MEDIUM
AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H
Red Hat
5.5 MEDIUM
qualitative

Primary rating from Vendor (Linux).

CVSS VectorVendor: Linux

Attack Vector
Local
Attack Complexity
Low
Privileges Required
Low
User Interaction
None
Scope
Unchanged
Confidentiality
High
Integrity
High
Availability
High

Lifecycle Timeline

5
Analysis Generated
Aug 14, 2026 - 03:08 vuln.today
CVSS changed
Aug 13, 2026 - 23:37 NVD
7.8 (HIGH)
Patch available
Aug 10, 2026 - 14:18 EUVD
CVE Published
Aug 10, 2026 - 12:03 cve.org
HIGH 7.8
CVE Published
Aug 10, 2026 - 12:03 cve.org
UNKNOWN (no severity yet)

DescriptionCVE.org

In the Linux kernel, the following vulnerability has been resolved:

net: airoha: Fix DMA direction for NPU mailbox buffer

airoha_npu_send_msg() always maps the mailbox buffer with DMA_TO_DEVICE, but some callers expect the NPU to write response data back into the same buffer:

  • airoha_npu_wlan_msg_get() (NPU_OP_GET): NPU writes response into

the buffer, then the caller reads it via memcpy()

  • airoha_npu_ppe_stats_setup() (NPU_OP_SET): NPU writes back

npu_stats_addr field in the response

On non-cache-coherent architectures like EN7581 (Cortex-A53 without hardware cache coherency for NPU DMA), DMA_TO_DEVICE unmap is a no-op

  • it does not invalidate the CPU cache. If the NPU-written cache line

is still present in the CPU cache when the caller reads the buffer, the CPU observes stale data instead of the NPU response.

This is a timing-sensitive bug: small mailbox buffers (~24 bytes) typically fit in a single cache line and may survive in the cache until the caller reads them, producing silent data corruption rather than a crash. The bug is more likely to trigger when the caller reads the response immediately after dma_unmap_single() without intervening cache-evicting operations.

Fix by using DMA_BIDIRECTIONAL for both map and unmap, which ensures dma_unmap_single() invalidates the CPU cache on non-coherent systems. The mailbox buffers are small so there is no performance concern.

AnalysisAI

Silent data corruption in the Linux kernel's airoha NPU mailbox driver affects EN7581-based systems (Cortex-A53 without hardware DMA cache coherency) when NPU response data is read back through a CPU cache that was never invalidated. The driver's airoha_npu_send_msg() function maps buffers exclusively as DMA_TO_DEVICE, causing dma_unmap_single() to skip cache invalidation on non-coherent architectures - so CPU reads of NPU-written responses observe stale cached values rather than actual NPU output. The CVSS 7.8 score reflects high confidentiality, integrity, and availability impact for local low-privilege users; however, hardware specificity and timing sensitivity keep real-world exploitation likelihood low (EPSS 0.20%, 10th percentile), and no public exploit or CISA KEV listing exists.

Technical ContextAI

The vulnerability is rooted in incorrect DMA direction mapping within the airoha network driver's NPU (Network Processing Unit) mailbox interface. The EN7581 SoC uses a Cortex-A53 CPU cluster that lacks hardware cache coherency for NPU DMA regions, meaning the kernel must explicitly manage cache state through DMA API direction flags. When DMA_TO_DEVICE is used, the unmap operation flushes the CPU cache outward but does not invalidate inbound stale lines - a deliberate DMA API behavior. Two callers violate this contract: airoha_npu_wlan_msg_get() using NPU_OP_GET and airoha_npu_ppe_stats_setup() using NPU_OP_SET both expect the NPU to write back into the same buffer that was mapped DMA_TO_DEVICE. Because the small mailbox buffers (~24 bytes, fitting in a single cache line) may persist in CPU cache after unmap, the CPU reads its own stale copy rather than the NPU-written data, producing silent corruption. The CWE is not formally assigned, but the root cause class is incorrect resource lifecycle management combined with a cache coherency invariant violation. The fix changes the DMA direction to DMA_BIDIRECTIONAL, which forces cache invalidation on unmap regardless of architecture. Affected CPE: cpe:2.3:a:linux:linux:*:*:*:*:*:*:*:*.

RemediationAI

Apply the upstream stable kernel patches available at https://git.kernel.org/stable/c/76fc5604308a109bf5838c2a0a0eb3ac6819f1ea, https://git.kernel.org/stable/c/4c4d866a64f36718cbcdf20add372a599dd44311, and https://git.kernel.org/stable/c/6f884eb87a79e0c482baef2ad96c96b81d024235, corresponding to fixed releases Linux 6.18.42, 7.1.6, and 7.2-rc5 per vendor patch data and EUVD-2026-55431. The fix changes DMA_TO_DEVICE to DMA_BIDIRECTIONAL in airoha_npu_send_msg(), ensuring cache invalidation on unmap for non-coherent architectures; the small buffer size means no meaningful performance impact. If immediate patching is not possible on EN7581 deployments, restricting local user access to processes capable of triggering NPU mailbox operations (NPU_OP_GET and NPU_OP_SET paths) reduces exposure, though this is not a complete mitigation and requires understanding of the specific deployment's privilege model. Systems not using EN7581 hardware require no action.

Vendor StatusVendor

SUSE

Severity: Moderate
Product Status
SUSE Linux Enterprise Desktop 15 SP7 Not-Affected
SUSE Linux Enterprise Desktop 15 SP7 Not-Affected
SUSE Linux Enterprise High Availability Extension 15 SP7 Not-Affected
SUSE Linux Enterprise High Availability Extension 15 SP7 Not-Affected
SUSE Linux Enterprise High Availability Extension 16.0 Not-Affected

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EUVD-2026-55431 vulnerability details – vuln.today

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