Severity by source
AV:N/AC:L/PR:N/UI:N/S:U/C:N/I:N/A:H
Exploitation requires supplying a crafted binary for local emulation rather than attacking a network service, so AV:L; no confidentiality/integrity loss, availability/state-correctness impact only.
Primary rating from NVD.
CVSS VectorNVD
Lifecycle Timeline
5DescriptionCVE.org
NEMU (OpenXiangShan/NEMU) before v2025.12.r2 contains an improper instruction-validation flaw in its RISC-V Vector (RVV) decoder. The decoder does not correctly validate the funct3 field when decoding vsetvli/vsetivli/vsetvl, allowing certain invalid OP-V instruction encodings to be misinterpreted and executed as vset* configuration instructions rather than raising an illegal-instruction exception. This can be exploited by providing crafted RISC-V binaries to cause incorrect trap behavior, architectural state corruption/divergence, and potential denial of service in systems that rely on NEMU for correct execution or sandboxing.
AnalysisAI
Availability-impacting instruction-decoding flaw in OpenXiangShan NEMU (a RISC-V emulator/reference model) before v2025.12.r2 lets crafted RISC-V binaries slip malformed OP-V encodings past the RVV decoder. Because the decoder fails to validate the funct3 field, invalid vector instructions are misinterpreted and executed as vsetvli/vsetivli/vsetvl configuration instructions instead of raising an illegal-instruction exception, causing incorrect trap behavior, architectural-state divergence, and denial of service. There is no public exploit identified at time of analysis, EPSS is negligible (0.01%), and CISA SSVC records exploitation status as none.
Technical ContextAI
NEMU is the emulator/architectural reference model of the OpenXiangShan open-source RISC-V processor project, used to execute RISC-V binaries and to differentially validate the XiangShan RTL. The defect lives in the RISC-V Vector (RVV) extension decoder (src/isa/riscv64/instr/rvv/decode.h), where instruction dispatch relies on matching bit-field patterns including funct3. The vset* family (vsetvli/vsetivli/vsetvl) shares major opcode OP-V (0x57) with arithmetic vector instructions and is distinguished by funct3; when funct3 is not correctly checked, certain reserved/invalid OP-V encodings alias onto the vset* decode path. The upstream fix (PR #958, commit 481de637) tightens the decode tables in the vopmvx/vopmvv helpers so illegal encodings are rejected. Note that the assigned CWE-131 (Incorrect Calculation of Buffer Size) appears mismatched with the actual root cause, which is improper validation of an instruction-encoding field (closer to improper input/instruction validation); treat the CWE as unreliable metadata here.
RemediationAI
Vendor-released patch: upgrade NEMU to v2025.12.r2 or later, which includes the corrected RVV decode tables. The authoritative fix is PR https://github.com/OpenXiangShan/NEMU/pull/958 and commit https://github.com/OpenXiangShan/NEMU/commit/481de637d5fc5838356caee80a79e56a33754039; teams building NEMU from source can cherry-pick that commit if they cannot move to the tagged release. If patching must be deferred, do not feed untrusted or attacker-supplied RISC-V binaries to NEMU and restrict emulation to vetted workloads; where NEMU is used for differential testing against XiangShan RTL, treat any decode divergence as a validation failure rather than a benign mismatch. These controls trade off throughput and the ability to fuzz arbitrary binaries, but they close the only realistic exposure path (untrusted binary input) until the upgrade is applied.
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Same weakness CWE-131 – Incorrect Calculation of Buffer Size
View allSame technique Denial Of Service
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External POC / Exploit Code
Leaving vuln.today
EUVD-2026-23937