EUVD-2026-76643
GHSA-qhph-j75q-5546
Severity by source
AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:H
Local low-privilege access triggers deterministic MMIO OOB read; no integrity impact; C:H for kernel memory disclosure, A:H for potential kernel crash.
Primary rating from Vendor (Linux).
CVSS VectorVendor: Linux
Lifecycle Timeline
6DescriptionCVE.org
In the Linux kernel, the following vulnerability has been resolved:
cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read
cxl_rch_get_aer_info() copies the RCH Downstream Port AER capability from the RCRB MMIO block using a readl() loop bounded by sizeof(struct aer_capability_regs). This struct is a software layout and its embedded struct pcie_tlp_log is larger than the on-wire AER capability. As a result the loop reads past the mapped AER register block.
The over-read also populates the software-only tail fields including header_log.header_len. An out-of-range header_len passed to pcie_print_tlp_log() can then loop past the header log buffer and cause a second out-of-bounds read.
The read was correct when introduced, but struct pcie_tlp_log has since grown (Header Log and TLP Prefix Log sizes, header_len and flit fields), so sizeof(struct aer_capability_regs) no longer matches the physical AER capability.
Bound the read to the physical AER registers, header through the 16 byte Header Log. Zero the destination first so the software-only fields are deterministic.
AnalysisAI
Out-of-bounds MMIO reads in the Linux kernel CXL RAS driver expose kernel memory contents and can crash the system on hosts equipped with CXL RCH hardware. The cxl_rch_get_aer_info() function bounds its readl() loop by the size of a software struct (struct aer_capability_regs) that has grown beyond the fixed physical on-wire AER register block due to expansions in struct pcie_tlp_log; reading past the MMIO mapping then populates header_log.header_len with garbage, triggering a second OOB read inside pcie_print_tlp_log(). …
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Attack ChainAIDerived
Hypothetical attack flow derived from CVE metadata
Vulnerability AssessmentAI
| Exploitation | Exploitation requires all three of the following: (1) CXL RCH (Restricted CXL Host) hardware physically installed in the target server - machines without CXL hardware are entirely unaffected; (2) a kernel version from approximately 6.7 up to but not including 6.18.51, 7.2.4, or 7.3-rc1; and (3) local access with at least PR:L (low privilege) sufficient to trigger the AER capability read path in the CXL RAS subsystem. … Additional conditions and limiting factors are described in the full assessment. |
| Risk Assessment | The vendor-assigned CVSS 3.1 score of 7.1 (AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:H) is broadly appropriate. … Full risk analysis with EPSS, KEV, and SSVC signal comparison available after sign-in. |
| Exploit Scenario | Full exploit scenario with step-by-step reproduction available after sign-in. |
| Remediation | Upgrade to Linux kernel 6.18.51, 7.2.4, or 7.3-rc1, all of which contain the fix bounding the readl() loop to the physical AER register size and zeroing the destination struct. … Detailed patch versions, workarounds, and compensating controls in full report. |
Recommended ActionAI
Within 24 hours, inventory servers with CXL hardware to identify exposure scope; check server specifications and lspci output for CXL device presence. …
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